[PATCH 5/6] riscv: allow kmalloc() caches aligned to the smallest value
Jisheng Zhang
jszhang at kernel.org
Wed May 31 07:52:14 PDT 2023
On Tue, May 30, 2023 at 02:08:10PM +0100, Catalin Marinas wrote:
> On Tue, May 30, 2023 at 11:34:06AM +0100, Conor Dooley wrote:
> > On Tue, May 30, 2023 at 10:59:41AM +0100, Catalin Marinas wrote:
> > > On Mon, May 29, 2023 at 12:17:46PM +0100, Conor Dooley wrote:
> > > > On Sat, May 27, 2023 at 12:59:57AM +0800, Jisheng Zhang wrote:
> > > > > After this patch, a simple test of booting to a small buildroot rootfs
> > > > > on qemu shows:
> > > > >
> > > > > kmalloc-96 5041 5041 96 ...
> > > > > kmalloc-64 9606 9606 64 ...
> > > > > kmalloc-32 5128 5128 32 ...
> > > > > kmalloc-16 7682 7682 16 ...
> > > > > kmalloc-8 10246 10246 8 ...
> > > > >
> > > > > So we save about 1268KB memory. The saving will be much larger in normal
> > > > > OS env on real HW platforms.
> > > > >
> > > > > [1] Link: https://lore.kernel.org/linux-arm-kernel/20230524171904.3967031-1-catalin.marinas@arm.com/
> >
> > While I think of it, Link: goes at the start of the line, the [1] should
> > go at the end (although I don't think you actually reference the link
> > anywhere in the text & it'll probably not be particularly relevant if a
> > subsequent revision of that patchset is applied.
>
> I plan to post at least one more. I'd suggest the risc-v patchset to
> only go in once my series landed.
Sure I will wait for your series landing in linus tree firstly.
>
> > > > > Signed-off-by: Jisheng Zhang <jszhang at kernel.org>
> > > >
> > > > Fails to build chief, with loads of:
> > > > linux/dma-mapping.h:546:19: error: redefinition of 'dma_get_cache_alignment'
> > > >
> > > > And for 32-bit there's also a rake of:
> > > > include/linux/slab.h:239:9: warning: 'ARCH_KMALLOC_MINALIGN' macro redefined [-Wmacro-redefined]
> > > >
> > > > At the very least, reproducable with rv32_defconfig.
> > >
> > > Have you this it on top of the KMALLOC_MINALIGN preparation series?
> > >
> > > https://lore.kernel.org/r/20230524171904.3967031-1-catalin.marinas@arm.com/
> >
> > Oh, no. Thanks for pointing that out.
> > Our automation stuff only uses what is in riscv/{for-next,master,fixes}.
> > Unless my reading comprehension is particularly bad of late it was
Aha I dunno this mechanism before.
> > non-obvious that this depended on something that had not yet been
Your reading comprehension is good ;) I just listed the dependency but
didn't explictly mention its merge status.
I will wait for Catalin's series being merged.
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