[RFC PATCH 10/22] riscv: s64ilp32: Enable user space runtime environment
guoren at kernel.org
guoren at kernel.org
Thu May 18 06:10:01 PDT 2023
From: Guo Ren <guoren at linux.alibaba.com>
RV64ILP32 uses the same setting from COMPAT mode for the user
space runtime environment. They all have the same 2GB TASK_SIZE.
Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
Signed-off-by: Guo Ren <guoren at kernel.org>
---
arch/riscv/include/asm/csr.h | 2 --
arch/riscv/include/asm/pgtable.h | 8 +++++++-
arch/riscv/kernel/process.c | 4 +++-
3 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index adc3c866d353..7558e0808af4 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -36,11 +36,9 @@
#define SR_SD _AC(0x8000000000000000, ULL) /* FS/XS dirty */
#endif
-#if __riscv_xlen == 64
#define SR_UXL _AC(0x300000000, ULL) /* XLEN mask for U-mode */
#define SR_UXL_32 _AC(0x100000000, ULL) /* XLEN = 32 for U-mode */
#define SR_UXL_64 _AC(0x200000000, ULL) /* XLEN = 64 for U-mode */
-#endif
/* SATP flags */
#if __riscv_xlen == 32
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 3303fc03d724..d7b8eff0ade9 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -830,26 +830,32 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
* - 0x9fc00000 (~2.5GB) for RV32.
* - 0x4000000000 ( 256GB) for RV64 using SV39 mmu
* - 0x800000000000 ( 128TB) for RV64 using SV48 mmu
+ * - 0x80000000 ( 2GB) for COMPAT and RV64ILP32
*
* Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V
* Instruction Set Manual Volume II: Privileged Architecture" states that
* "load and store effective addresses, which are 64bits, must have bits
* 63–48 all equal to bit 47, or else a page-fault exception will occur."
*/
+#define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE)
+
#ifdef CONFIG_64BIT
#define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2)
#define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2)
#ifdef CONFIG_COMPAT
-#define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE)
#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
TASK_SIZE_32 : TASK_SIZE_64)
#else
#define TASK_SIZE TASK_SIZE_64
#endif
+#else
+#ifdef CONFIG_ARCH_RV64ILP32
+#define TASK_SIZE TASK_SIZE_32
#else
#define TASK_SIZE FIXADDR_START
+#endif
#define TASK_SIZE_MIN TASK_SIZE
#endif
diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
index ab01b51a5bb9..e033dbe5b5eb 100644
--- a/arch/riscv/kernel/process.c
+++ b/arch/riscv/kernel/process.c
@@ -125,13 +125,15 @@ void start_thread(struct pt_regs *regs, unsigned long pc,
regs->epc = pc;
regs->sp = sp;
-#ifdef CONFIG_64BIT
regs->status &= ~SR_UXL;
+#ifdef CONFIG_64BIT
if (is_compat_task())
regs->status |= SR_UXL_32;
else
regs->status |= SR_UXL_64;
+#else
+ regs->status |= SR_UXL_32;
#endif
}
--
2.36.1
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