[PATCH v3 5/7] dt-bindings: soc: starfive: Add StarFive syscon module

Xingyu Wu xingyu.wu at starfivetech.com
Mon May 8 23:52:27 PDT 2023


On 2023/5/9 14:35, Conor Dooley wrote:
> 
> 
> On 9 May 2023 07:23:18 IST, Xingyu Wu <xingyu.wu at starfivetech.com> wrote:
>>On 2023/5/9 3:24, Conor Dooley wrote:
>>> On Mon, Apr 24, 2023 at 06:15:47PM +0100, Conor Dooley wrote:
>>>> On Fri, Apr 14, 2023 at 10:41:55AM +0800, Xingyu Wu wrote:
>>>> > From: William Qiu <william.qiu at starfivetech.com>
>>>> > 
>>>> > Add documentation to describe StarFive System Controller Registers.
>>>> > 
>>>> > Signed-off-by: William Qiu <william.qiu at starfivetech.com>
>>>> > ---
>>>> >  .../soc/starfive/starfive,jh7110-syscon.yaml  | 58 +++++++++++++++++++
>>>> >  MAINTAINERS                                   |  6 ++
>>>> >  2 files changed, 64 insertions(+)
>>>> >  create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>>> > 
>>>> > diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>>> > new file mode 100644
>>>> > index 000000000000..de086e74a229
>>>> > --- /dev/null
>>>> > +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>>> > @@ -0,0 +1,58 @@
>>>> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>>> > +%YAML 1.2
>>>> > +---
>>>> > +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
>>>> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> > +
>>>> > +title: StarFive JH7110 SoC system controller
>>>> > +
>>>> > +maintainers:
>>>> > +  - William Qiu <william.qiu at starfivetech.com>
>>>> > +
>>>> > +description: |
>>>> > +  The StarFive JH7110 SoC system controller provides register information such
>>>> > +  as offset, mask and shift to configure related modules such as MMC and PCIe.
>>>> > +
>>>> > +properties:
>>>> > +  compatible:
>>>> > +    oneOf:
>>>> > +      - items:
>>>> > +          - enum:
>>>> > +              - starfive,jh7110-aon-syscon
>>>> > +              - starfive,jh7110-sys-syscon
>>>> > +          - const: syscon
>>>> > +          - const: simple-mfd
>>>> > +      - items:
>>>> > +          - const: starfive,jh7110-stg-syscon
>>>> > +          - const: syscon
>>>> > +
>>>> > +  reg:
>>>> > +    maxItems: 1
>>>> > +
>>>> > +  clock-controller:
>>>> > +    $ref: /schemas/clock/starfive,jh7110-pll.yaml#
>>>> > +    type: object
>>>> > +
>>>> > +  power-controller:
>>>> > +    $ref: /schemas/power/starfive,jh7110-pmu.yaml#
>>>> > +    type: object
>>>> 
>>>> My plan was to grab this patch after the merge window, but there's been
>>>> some back and forth [1] about what exactly should be a power-controller
>>>> here. Given the merge window is open & I know Emil wants to look at the
>>>> various clock bits for the JH7110, I don't think there's a pressing need
>>>> for you to do anything here, but figured I'd at least mention how things
>>>> are going on this thread too.
>>> 
>>> To follow up on this, it transpired in that thread that this node, not a
>>> child node, should be the power controller.
>>> 
>>> Up to you StarFive folk how you wish to resend, but I am fine with it
>>> being in this series, I shall just not pick up the soc driver patches
>>> until the resent binding is applied by Stephen.
>>> 
>>
>>Thanks. I had discussed with changhuang.liang about this. And I will drop
>>the 'starfive,jh7110-aon-syscon' and 'power-controller' in next patchset.
>>Changhuang will take these in his patchset.
> 
> Won't that result in broken bindings, since there's a ref to the pll binding?
> Keeping it in the same series (i.e. this one) makes
> the most sense to me.
> 

I will keep the 'sys-syscon' and 'stg-syscon'. The ref just follows the 'sys-syscon'
so I also keep it and the pll binding.
I also hope to add the 'aon-syscon' in this same series but it should be the power
controller, so I have to give up it.

Best regards,
Xingyu Wu



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