[PATCH 3/5] riscv: dts: add initial T-HEAD light SoC device tree

Jisheng Zhang jszhang at kernel.org
Mon May 8 09:26:10 PDT 2023


On Sun, May 07, 2023 at 10:35:12PM +0100, Conor Dooley wrote:
> Hey Jisheng,
> 
> On Mon, May 08, 2023 at 02:23:02AM +0800, Jisheng Zhang wrote:
> 
> > +		c910_0: cpu at 0 {
> > +			compatible = "thead,c910", "riscv";
> > +			device_type = "cpu";
> > +			riscv,isa = "rv64imafdc";
> 
> Does this support more than "rv64imafdc"?
> I assume there's some _xtheadfoo extensions that it does support,
> although I am not sure how we are proceeding with those - Heiko might
> have a more nuanced take.
> 
> > +		reset: reset-sample {
> > +			compatible = "thead,reset-sample";
> 
> What is a "reset-sample"?

This node is only for opensbi. The compatible string is already in
opensbi. Do we also need to add dt-binding for it in linux?

> 
> > +			entry-reg = <0xff 0xff019050>;
> > +			entry-cnt = <4>;
> > +			control-reg = <0xff 0xff015004>;
> > +			control-val = <0x1c>;
> > +			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
> > +		};
> > +
> > +		plic: interrupt-controller at ffd8000000 {
> > +			compatible = "thead,c910-plic";
> > +			reg = <0xff 0xd8000000 0x0 0x01000000>;
> > +			interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
> > +					      <&cpu1_intc 11>, <&cpu1_intc 9>,
> > +					      <&cpu2_intc 11>, <&cpu2_intc 9>,
> > +					      <&cpu3_intc 11>, <&cpu3_intc 9>;
> > +			interrupt-controller;
> > +			#interrupt-cells = <1>;
> > +			riscv,ndev = <240>;
> > +		};
> > +
> > +		clint: timer at ffdc000000 {
> > +			compatible = "thead,c900-clint";
> 
> "c900"? That a typo or intentional. Hard to tell since this compatible
> is undocumented ;)

Per my understanding, this node is only for opensbi too. Add will add
dt-binding in v2.

> 
> > +			reg = <0xff 0xdc000000 0x0 0x00010000>;
> > +			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
> > +					      <&cpu1_intc 3>, <&cpu1_intc 7>,
> > +					      <&cpu2_intc 3>, <&cpu2_intc 7>,
> > +					      <&cpu3_intc 3>, <&cpu3_intc 7>;
> > +		};
> > +
> > +		uart0: serial at ffe7014000 {
> > +			compatible = "snps,dw-apb-uart";
> > +			reg = <0xff 0xe7014000 0x0 0x4000>;
> > +			interrupts = <36>;
> > +			clocks = <&uart_sclk>;
> > +			clock-names = "baudclk";
> 
> dtbs_check complains about this clock name.
> > +
> > +		dmac0: dmac at ffefc00000 {
> 
> dma-controller@
> 
> As I mentioned in the other patch, please clean up the dtbs_check
> complaints for v2.
> 

Thanks for the reminding.



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