[PATCH v10 3/6] riscv: mm: dma-noncoherent: nonstandard cache operations support

[Lad, Prabhakar]

Hi Conor,

On Mon, Jul 31, 2023 at 12:39 PM Conor Dooley
<conor.dooley at microchip.com> wrote:
>
> On Mon, Jul 31, 2023 at 12:30:43PM +0100, Lad, Prabhakar wrote:
> > On Sun, Jul 30, 2023 at 4:09 PM Jisheng Zhang <jszhang at kernel.org> wrote:
> > > On Sun, Jul 02, 2023 at 09:34:26PM +0100, Prabhakar wrote:
> > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
>
> > > > +config RISCV_NONSTANDARD_CACHE_OPS
> > > > +     bool
> > > > +     depends on RISCV_DMA_NONCOHERENT
> > > > +     help
> > > > +       This enables function pointer support for non-standard noncoherent
> > > > +       systems to handle cache management.
> > >
> > > Per Documentation/riscv/patch-acceptance.rst:
> > >
> > > "we'll only consider patches for extensions that either:
> > >
> > > - Have been officially frozen or ratified by the RISC-V Foundation, or
> > > - Have been implemented in hardware that is widely available, per standard
> > >   Linux practice."
> > >
> > > I'm not sure which item this patch series belongs to.
> > >
> > Maybe Conor can help me here ;)
>
> I'm not entirely sure why you need my help, it's your company that
> manufactures the SoC that needs this after all.. I think Emil already
> pointed out that it was the latter of the two. I guess it is not an
> "extension" in the strictest sense of the word, but it fills the same
> gap as one, so /shrug.
>
Aaha I was wondering If there had to be an additional entry here to
fit this case, but if it already does fit in ignore me. Thanks for the
clarification.

Cheers,
Prabhakar