[PATCH v2 1/3] dt-bindings: riscv: sifive: Add SiFive Private L2 cache controller

[Conor Dooley]

On Fri, Jul 28, 2023 at 04:24:08PM +0800, Eric Lin wrote:
> On Fri, Jul 28, 2023 at 3:06 PM Conor Dooley <conor.dooley at microchip.com> wrote:
> > On Thu, Jul 20, 2023 at 06:10:51PM +0100, Conor Dooley wrote:
> > > On Thu, Jul 20, 2023 at 09:51:19PM +0800, Eric Lin wrote:

> > > > +description:
> > > > +  The SiFive Private L2 Cache Controller is per core and
> > > > +  communicates with both the upstream L1 caches and
> > > > +  downstream L3 cache or memory, enabling a high-performance
> > > > +  cache subsystem.
> > > > +
> > > > +allOf:
> > > > +  - $ref: /schemas/cache-controller.yaml#
> > > > +
> > >
> > > I'm pretty sure that I pointed out last time around that you need to add
> > > something like in the ccache driver:
> > >
> > > select:
> > >   properties:
> > >     compatible:
> > >       contains:
> > >         enum:
> > >           - sifive,ccache0
> > >           - sifive,fu540-c000-ccache
> > >           - sifive,fu740-c000-ccache
> > >
> > > otherwise this binding will be used for anything containing "cache" in
> > > the dt-binding.
> > > For this binding, I think that the following is sufficient:
> > >
> > > select:
> > >   properties:
> > >     compatible:
> > >       contains:
> > >           const: sifive,pl2cache1
> > >
> 
> Sorry, I misunderstood your meaning.
> To be honest, I'm not quite familiar with the usage of the select property.
> When should we use the select property?
> May I ask, is there a document to detail introduce each property and
> its usage like the device-tree spec?
> I think it would be very helpful for beginners writing correct
> dt-binding and it can save much reviewers time.

You need this select because otherwise this binding will match against
every other user of "cache" in the tree. It's explained here:
https://docs.kernel.org/devicetree/bindings/writing-schema.html

Thanks,
Conor.
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