[PATCH v5 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI

[Conor Dooley]

Hey William,

Since you pinged things, I had a quick look.

On Wed, Jul 19, 2023 at 05:25:44PM +0800, William Qiu wrote:
> Add JH7110's clock initialization code to the driver.
> 
> Signed-off-by: William Qiu <william.qiu at starfivetech.com>
> Reviewed-by: Hal Feng <hal.feng at starfivetech.com>

> Reported-by: kernel test robot <lkp at intel.com>
> Closes: https://lore.kernel.org/oe-kbuild-all/202306022017.UbwjjWRN-lkp@intel.com/
> Reported-by: Julia Lawall <julia.lawall at inria.fr>
> Closes: https://lore.kernel.org/r/202306040644.6ZHs55x4-lkp@intel.com/

These, as pointed out on the last version, should not be here.
kernel test robot complaints about un-applied patches do not get a
reported-by etc in subsequent versions of the same patchset, just as
comments from human reviewers do not require reported-by tags.

These tags should only be used when the code has been merged & you need
to create a new patch to fix the issue.

Hopefully, if the code is otherwise fine, Mark can fix this when he
applies the patches.

Thanks,
Conor.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 228 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-riscv/attachments/20230728/f7a995e8/attachment.sig>