[PATCH] tracing: Have all levels of checks prevent recursion
Steven Rostedt
rostedt at goodmis.org
Fri Jul 21 09:00:40 PDT 2023
On Fri, 21 Jul 2023 17:34:41 +0200
Alexander Lobakin <aleksander.lobakin at intel.com> wrote:
> From: Steven Rostedt <rostedt at goodmis.org>
> Date: Fri, 15 Oct 2021 14:25:41 -0400
>
> Sorry for such a necroposting :z
> Just wanted to know if this is a bug, so that I could send a fix, or
> intended behaviour.
>
> > On Fri, 15 Oct 2021 14:20:33 -0400
> > Steven Rostedt <rostedt at goodmis.org> wrote:
> >
> >>> I think having one copy of that in a header is better than having 3
> >>> copies. But yes, something along them lines.
> >>
> >> I was just about to ask you about this patch ;-)
> >
> > Except it doesn't build :-p (need to move the inlined function down a bit)
> >
> > diff --git a/include/linux/preempt.h b/include/linux/preempt.h
> > index 4d244e295e85..b32e3dabe28b 100644
> > --- a/include/linux/preempt.h
> > +++ b/include/linux/preempt.h
> > @@ -77,6 +77,27 @@
> > /* preempt_count() and related functions, depends on PREEMPT_NEED_RESCHED */
> > #include <asm/preempt.h>
> >
> > +/**
> > + * interrupt_context_level - return interrupt context level
> > + *
> > + * Returns the current interrupt context level.
> > + * 0 - normal context
> > + * 1 - softirq context
> > + * 2 - hardirq context
> > + * 3 - NMI context
> > + */
> > +static __always_inline unsigned char interrupt_context_level(void)
> > +{
> > + unsigned long pc = preempt_count();
> > + unsigned char level = 0;
> > +
> > + level += !!(pc & (NMI_MASK));
> > + level += !!(pc & (NMI_MASK | HARDIRQ_MASK));
> > + level += !!(pc & (NMI_MASK | HARDIRQ_MASK | SOFTIRQ_OFFSET));
>
> This doesn't take into account that we can switch the context manually
> via local_bh_disable() / local_irq_save() etc. During the testing of the
You cannot manually switch interrupt context.
> separate issue[0], I've found that the function returns 1 in both just
> softirq and softirq under local_irq_save().
> Is this intended? Shouldn't that be
That is intended behavior.
local_bh_disable() and local_irq_save() is not a context switch. It is just
preventing that context from happening. The interrupt_context_level() is to
tell us what context we are running in, not what context is disabled.
>
> level += !!(pc & (NMI_MASK));
> level += !!(pc * (NMI_MASK | HARDIRQ_MASK)) || irqs_disabled();
> level += !!(pc * (NMI_MASK | HARDIRQ_MASK | SOFTIRQ_OFFSET)) ||
> in_atomic();
>
> ?
> Otherwise, the result it returns is not really "context level".
local_bh_disable() use to (and perhaps still does in some configurations)
confuse things. But read the comment in kernel/softirq.c
/*
* SOFTIRQ_OFFSET usage:
*
* On !RT kernels 'count' is the preempt counter, on RT kernels this applies
* to a per CPU counter and to task::softirqs_disabled_cnt.
*
* - count is changed by SOFTIRQ_OFFSET on entering or leaving softirq
* processing.
*
* - count is changed by SOFTIRQ_DISABLE_OFFSET (= 2 * SOFTIRQ_OFFSET)
* on local_bh_disable or local_bh_enable.
*
* This lets us distinguish between whether we are currently processing
* softirq and whether we just have bh disabled.
*/
Just because you disable interrupts does not mean you are in interrupt
context.
-- Steve
>
> > +
> > + return level;
> > +}
> > +
> [0]
> https://lore.kernel.org/netdev/b3884ff9-d903-948d-797a-1830a39b1e71@intel.com
>
> Thanks,
> Olek
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