[PATCH v4 00/10] riscv: Allow userspace to directly access perf counters

Rémi Denis-Courmont remi at remlab.net
Wed Jul 19 07:45:57 PDT 2023


Le keskiviikkona 19. heinäkuuta 2023, 1.48.49 EEST Atish Patra a écrit :
> > Isn't RDTIM susceptible to interference from power management and CPU
> > frequency scaling? I suppose that RDCYCLE may behave differently depending
> > on PM in *some* designs, but that would still be way better than RDTIME
> > for the purpose.
> 
> Yes. But that's what it is probably using for other ISAs ?

At least on AArch64, it is using either Linux perf cycle counter, or if that 
is disabled at build time, the raw PMU cycle counter - which obviously leads 
to SIGILL on Linux, just like this MR would do with RDCYCLE.

Again, I do not *personally* have objections to disabling RDCYCLE for 
userspace (somebody else does, but that's neither my nor your problem). I do 
have objections to the wording of some of the commit messages though.

> My point was it should just do whatever it does for other ISA. RISC-V is no
> special in that regard.

Sure. My point is that RDTIME may be great for, so to say, system-level 
benchmarks. For FFmpeg that could something like how long it takes to 
transcode a video. But it doesn't seem to make much sense for 
microbenchmarking of single threaded tightly optimised loops, as opposed to 
RDCYCLE (or a wrapper for RDCYCLE).

-- 
Rémi Denis-Courmont
http://www.remlab.net/






More information about the linux-riscv mailing list