[PATCH v1 5/9] dt-bindings: PLDA: Add PLDA XpressRICH PCIe host controller
Krzysztof Kozlowski
krzysztof.kozlowski at linaro.org
Wed Jul 19 03:55:22 PDT 2023
On 19/07/2023 12:20, Minda Chen wrote:
> Add PLDA XpressRICH host controller dt-bindings. Both Microchip
> PolarFire SoC and StarFive JH7110 SoC are using PLDA XpressRICH
> PCIe host controller IP.
>
> Signed-off-by: Minda Chen <minda.chen at starfivetech.com>
> Reviewed-by: Hal Feng <hal.feng at starfivetech.com>
> ---
> .../pci/plda,xpressrich-pcie-host.yaml | 66 +++++++++++++++++++
> 1 file changed, 66 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-host.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-host.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-host.yaml
> new file mode 100644
> index 000000000000..10a10862a078
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-host.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-host.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: PLDA XpressRICH PCIe host controller
> +
> +maintainers:
> + - Daire McNamara <daire.mcnamara at microchip.com>
> + - Minda Chen <minda.chen at starfivetech.com>
> +
> +allOf:
> + - $ref: /schemas/pci/pci-bus.yaml#
> + - $ref: plda,xpressrich-pcie-common.yaml#
> + - $ref: /schemas/interrupt-controller/msi-controller.yaml#
> +
> +properties:
> + compatible:
> + const: plda,xpressrich-pcie-host
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - "#interrupt-cells"
> + - interrupts
> + - interrupt-map-mask
> + - interrupt-map
> + - msi-controller
Your common schema should require properties which it defines. Here you
should require only difference or new properties.
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + soc {
> + #address-cells = <2>;
Use 4 spaces for example indentation.
> + #size-cells = <2>;
> + pcie0: pcie at 12000000 {
Best regards,
Krzysztof
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