[PATCH v4 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI
Mark Brown
broonie at kernel.org
Tue Jul 4 09:41:23 PDT 2023
On Tue, Jul 04, 2023 at 05:36:03PM +0100, Conor Dooley wrote:
> On Tue, Jul 04, 2023 at 05:04:52PM +0800, William Qiu wrote:
> > Add QSPI clock operation in device probe.
> >
> > Signed-off-by: William Qiu <william.qiu at starfivetech.com>
> > Reviewed-by: Hal Feng <hal.feng at starfivetech.com>
> > Reported-by: kernel test robot <lkp at intel.com>
> > Closes: https://lore.kernel.org/oe-kbuild-all/202306022017.UbwjjWRN-lkp@intel.com/
> These Reported-by tags don't seem correct, given they were reports about
> this patch, not the reason for it - but did you actually check that you
> fixed the errors that the patch produces?
Yeah, the Reported-bys that LKP sends in response to on list patches are
a menace, they just generate noise.
> This particular one seems to complain about a hunk that is still in the
> patch & the CI running on the RISC-V patchwork is complaining about it.
I'm surprised that builds cleanly anywhere...
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 488 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-riscv/attachments/20230704/c984f922/attachment.sig>
More information about the linux-riscv
mailing list