[PATCH] Documentation: riscv: fix insufficient list item indent
Conor Dooley
conor at kernel.org
Sun Jan 29 15:57:01 PST 2023
From: Conor Dooley <conor.dooley at microchip.com>
When adding the ISA string ordering rules, I didn't sufficiently indent
one of the list items.
Reported-by: kernel test robot <lkp at intel.com>
Fixes: f07b2b3f9d47 ("Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo")
Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
---
Documentation/riscv/uabi.rst | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/riscv/uabi.rst b/Documentation/riscv/uabi.rst
index 2ebec4c52230..8960fac42c40 100644
--- a/Documentation/riscv/uabi.rst
+++ b/Documentation/riscv/uabi.rst
@@ -21,10 +21,10 @@ so for our purposes the following rules apply:
single-letter extensions and before any higher-privileged extensions.
#. For additional standard extensions, the first letter following the 'Z'
- conventionally indicates the most closely related alphabetical
- extension category. If multiple 'Z' extensions are named, they will be ordered
- first by category, in canonical order, as listed above, then alphabetically
- within a category.
+ conventionally indicates the most closely related alphabetical
+ extension category. If multiple 'Z' extensions are named, they will be
+ ordered first by category, in canonical order, as listed above, then
+ alphabetically within a category.
#. Standard supervisor-level extensions (starting with 'S') will be listed
after standard unprivileged extensions. If multiple supervisor-level
--
2.39.1
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