[RFC PATCH v2 12/31] kvx: Add other common headers
Jules Maselbas
jmaselbas at kalray.eu
Wed Jan 25 13:55:19 PST 2023
Hi Jason,
On Fri, Jan 20, 2023 at 03:29:14PM +0100, Jason A. Donenfeld wrote:
> Hi Yann,
>
> On Fri, Jan 20, 2023 at 03:09:43PM +0100, Yann Sionneau wrote:
> > +#include <linux/random.h>
> > +#include <linux/version.h>
> > +
> > +extern unsigned long __stack_chk_guard;
> > +
> > +/*
> > + * Initialize the stackprotector canary value.
> > + *
> > + * NOTE: this must only be called from functions that never return,
> > + * and it must always be inlined.
> > + */
> > +static __always_inline void boot_init_stack_canary(void)
> > +{
> > + unsigned long canary;
> > +
> > + /* Try to get a semi random initial value. */
> > + get_random_bytes(&canary, sizeof(canary));
> > + canary ^= LINUX_VERSION_CODE;
> > + canary &= CANARY_MASK;
> > +
> > + current->stack_canary = canary;
> > + __stack_chk_guard = current->stack_canary;
> > +}
>
>
> You should rewrite this as:
>
> current->stack_canary = get_random_canary();
> __stack_chk_guard = current->stack_canary;
>
> which is what the other archs all now do. (They didn't used to, and this
> looks like it's simply based on older code.)
Thanks for the suggestion, this will be into v3
> > +#define get_cycles get_cycles
> > +
> > +#include <asm/sfr.h>
> > +#include <asm-generic/timex.h>
> > +
> > +static inline cycles_t get_cycles(void)
> > +{
> > + return kvx_sfr_get(PM0);
> > +}
>
> Glad to see this CPU has a cycle counter. Out of curiosity, what is
> its resolution?
This cpu has 4 performance monitor (PM), the first one is reserved to
count cycles, and it is cycle accurate.
> Also, related, does this CPU happen to have a "RDRAND"-like instruction?
I didn't knew about the RDRAND insruction, but no this CPU do not have
an instruction like that.
> (I don't know anything about kvx or even what it is.)
It's a VLIW core, a bit like Itanium, there are currently not publicly
available documentation. We have started a discussion internally at
Kalray to share more information regarding this CPU and its ABI.
A very crude instruction listing can be found in our fork of
gdb-binutils: https://raw.githubusercontent.com/kalray/binutils/binutils-2_35_2/coolidge/opcodes/kv3-opc.c
Best regards,
-- Jules
More information about the linux-riscv
mailing list