[PATCH v2 2/3] hwrng: starfive - Add TRNG driver for StarFive SoC
JiaJie Ho
jiajie.ho at starfivetech.com
Sun Jan 8 19:41:14 PST 2023
> -----Original Message-----
> From: Herbert Xu <herbert at gondor.apana.org.au>
> Sent: 9 January, 2023 11:04 AM
> To: JiaJie Ho <jiajie.ho at starfivetech.com>
> Cc: Olivia Mackall <olivia at selenic.com>; Rob Herring <robh+dt at kernel.org>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>; Emil Renner
> Berthing <kernel at esmil.dk>; Conor Dooley <conor.dooley at microchip.com>;
> linux-crypto at vger.kernel.org; devicetree at vger.kernel.org; linux-
> kernel at vger.kernel.org; linux-riscv at lists.infradead.org
> Subject: Re: [PATCH v2 2/3] hwrng: starfive - Add TRNG driver for StarFive
> SoC
>
> On Mon, Jan 09, 2023 at 02:58:14AM +0000, JiaJie Ho wrote:
> >
> > My trng device requires sending a generate new number cmd before each
> read.
> > It then only populates the data registers with new random number and
> raise an interrupt when ready.
> > If user choose to not wait, they will always get stale bits.
> > Is it okay to always return error if wait=false ?
>
> What is the length of the wait time? Is there an upper bound?
> What is the average wait time?
>
The average wait time is around 20 microseconds.
I measured from writel cmd to wait_for_completion done.
Thanks
Jia Jie
More information about the linux-riscv
mailing list