[PATCH v3 0/2] riscv,isa fixups

[Palmer Dabbelt]

On Mon, 05 Dec 2022 09:44:58 PST (-0800), Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
>
> I noticed ~today~ while looking at the isa manual that I had not
> accounted for another couple of edge cases with my regex. As before, I
> think attempting to validate the canonical order for multiletter stuff
> makes no sense - but we should totally try to avoid false-positives for
> combinations that are known to be valid.
>
> All I've changed for v2 was collecting tags & adding in the missing
> commit reference that Heiko pointed out.
>
> v3 fixes an issue Jess spotted - it's *any* multi-letter extension that
> can come immediately after the single-letter ones, not just ones
> starting with Z.
>
> @Palmer, either you can take this once the DT folks have ACKed it if you
> like, or I will take onto some v6.2-rcN fixes branch. I don't think that
> there is any urgency :)

Sorry I missed these.  

Reviewed-by: Palmer Dabbelt <palmer at rivosinc.com>
Acked-by: Palmer Dabbelt <palmer at rivosinc.com>

We can just do a shared tag if you have stuff that depends on them?  
That'll let me keep fixes clean, as I'm running the DT stuff too now.  
Though maybe it doesn't matter so much because I'm not really taking any 
DT stuff.

> Thanks,
> Conor.
>
> CC: Jessica Clarke <jrtc27 at jrtc27.com>
> CC: Conor Dooley <conor at kernel.org>
> CC: Rob Herring <robh+dt at kernel.org>
> CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>
> CC: Paul Walmsley <paul.walmsley at sifive.com>
> CC: Palmer Dabbelt <palmer at dabbelt.com>
> CC: Albert Ou <aou at eecs.berkeley.edu>
> CC: Heiko Stuebner <heiko at sntech.de>
> CC: Andrew Jones <ajones at ventanamicro.com>
> CC: Guo Ren <guoren at kernel.org>
> CC: linux-riscv at lists.infradead.org
> CC: devicetree at vger.kernel.org
> CC: linux-kernel at vger.kernel.org
>
> Conor Dooley (2):
>   dt-bindings: riscv: fix underscore requirement for multi-letter
>     extensions
>   dt-bindings: riscv: fix single letter canonical order
>
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)