[RFC v5.1 6/9] cache,soc: Move SiFive CCache driver & create drivers/cache

[Ben Dooks]

On 03/01/2023 21:03, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
> 
> The Zicbo* set of extensions for cache maintenance arrived too late &
> several SoCs exist without them that require non-coherent DMA.
> As things stand, the StarFive JH7100, Microchip PolarFire SoC & Renesas
> RZ/Five all require cache maintenance and lack instructions for this
> purpose.
> Create a subsystem for cache drivers so that vendor specific behaviour
> can be isolated from arch code, but keep the interfaces etc consistent.
> Move the existing SiFive CCache driver to create drivers/cache.
> 
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---
>   MAINTAINERS                                   | 15 ++++++++-------
>   drivers/Kconfig                               |  2 ++
>   drivers/Makefile                              |  2 ++
>   drivers/{soc/sifive => cache}/Kconfig         |  8 +++++++-
>   drivers/{soc/sifive => cache}/Makefile        |  0
>   drivers/{soc/sifive => cache}/sifive_ccache.c |  2 +-
>   drivers/edac/sifive_edac.c                    |  2 +-
>   drivers/soc/Kconfig                           |  1 -
>   drivers/soc/Makefile                          |  1 -
>   include/{soc/sifive => cache}/sifive_ccache.h |  0
>   10 files changed, 21 insertions(+), 12 deletions(-)
>   rename drivers/{soc/sifive => cache}/Kconfig (56%)
>   rename drivers/{soc/sifive => cache}/Makefile (100%)
>   rename drivers/{soc/sifive => cache}/sifive_ccache.c (99%)
>   rename include/{soc/sifive => cache}/sifive_ccache.h (100%)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f61eb221415b..4437e96a657b 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19054,13 +19054,6 @@ S:	Maintained
>   F:	Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
>   F:	drivers/dma/sf-pdma/
>   
> -SIFIVE SOC DRIVERS
> -M:	Conor Dooley <conor at kernel.org>
> -L:	linux-riscv at lists.infradead.org
> -S:	Maintained
> -T:	git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
> -F:	drivers/soc/sifive/
> -
>   SILEAD TOUCHSCREEN DRIVER
>   M:	Hans de Goede <hdegoede at redhat.com>
>   L:	linux-input at vger.kernel.org
> @@ -19873,6 +19866,14 @@ S:	Supported
>   T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git
>   F:	drivers/staging/
>   
> +STANDALONE CACHE CONTROLLER DRIVERS
> +M:	Conor Dooley <conor at kernel.org>
> +L:	linux-riscv at lists.infradead.org
> +S:	Maintained
> +T:	git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
> +F:	drivers/cache
> +F:	include/cache
I thought the riscv list was subscribers only?

Maybe if we do the suggestion of other cache drivers here we should
either use the main kernel one or find some arch non-specific list.

> +
>   STARFIRE/DURALAN NETWORK DRIVER
>   M:	Ion Badulescu <ionut at badula.org>
>   S:	Odd Fixes
> diff --git a/drivers/Kconfig b/drivers/Kconfig
> index 968bd0a6fd78..e592ba5276ae 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -241,4 +241,6 @@ source "drivers/peci/Kconfig"
>   
>   source "drivers/hte/Kconfig"
>   
> +source "drivers/cache/Kconfig"
> +
>   endmenu
> diff --git a/drivers/Makefile b/drivers/Makefile
> index bdf1c66141c9..6ff60cf21823 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -38,6 +38,8 @@ obj-y				+= clk/
>   # really early.
>   obj-$(CONFIG_DMADEVICES)	+= dma/
>   
> +obj-y				+= cache/
> +
>   # SOC specific infrastructure drivers.
>   obj-y				+= soc/
>   
> diff --git a/drivers/soc/sifive/Kconfig b/drivers/cache/Kconfig
> similarity index 56%
> rename from drivers/soc/sifive/Kconfig
> rename to drivers/cache/Kconfig
> index ed4c571f8771..bc852f005c10 100644
> --- a/drivers/soc/sifive/Kconfig
> +++ b/drivers/cache/Kconfig
> @@ -1,9 +1,15 @@
>   # SPDX-License-Identifier: GPL-2.0
>   
> -if SOC_SIFIVE
> +menuconfig CACHE_CONTROLLER
> +	bool "Cache controller driver support"
> +	default y if RISCV
> +
> +if CACHE_CONTROLLER
>   
>   config SIFIVE_CCACHE
>   	bool "Sifive Composable Cache controller"
> +	depends on RISCV
> +	default y
>   	help
>   	  Support for the composable cache controller on SiFive platforms.
>   

Maybe we should find and move the ARM PL cache controllers and
have them here too?

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

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