[PATCH v1 3/4] riscv: dts: starfive: jh7110: Add temperature sensor node
Hal Feng
hal.feng at starfivetech.com
Mon Jan 2 17:31:44 PST 2023
From: Emil Renner Berthing <kernel at esmil.dk>
Add temperature sensor support for StarFive JH7110 SoC.
Signed-off-by: Emil Renner Berthing <kernel at esmil.dk>
Signed-off-by: Hal Feng <hal.feng at starfivetech.com>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 64d260ea1f29..793ae26bf72d 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -353,6 +353,19 @@ uart5: serial at 12020000 {
status = "disabled";
};
+ sfctemp: tmon at 120e0000 {
+ compatible = "starfive,jh7110-temp";
+ reg = <0x0 0x120e0000 0x0 0x10000>;
+ clocks = <&syscrg JH7110_SYSCLK_TEMP_CORE>,
+ <&syscrg JH7110_SYSCLK_TEMP_APB>;
+ clock-names = "sense", "bus";
+ resets = <&syscrg JH7110_SYSRST_TEMP_CORE>,
+ <&syscrg JH7110_SYSRST_TEMP_APB>;
+ reset-names = "sense", "bus";
+ interrupts = <81>;
+ #thermal-sensor-cells = <0>;
+ };
+
syscrg: clock-controller at 13020000 {
compatible = "starfive,jh7110-syscrg";
reg = <0x0 0x13020000 0x0 0x10000>;
--
2.38.1
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