[PATCH v1] dt-bindings: riscv: add sv57 mmu-type

[Conor Dooley]

On Fri, Apr 21, 2023 at 07:07:50PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
> 
> Dumping the dtb from new versions of QEMU warns that sv57 is an
> undocumented mmu-type. The kernel has supported sv57 for about a year,
> so bring it into the fold.
> 
Whoops, completely missed a \ in my send command and lost the dt folks..

I'll resend it at some point I suppose!

> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
> index 4c7ce4a37052..25d6e8dbffb8 100644
> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> @@ -66,6 +66,7 @@ properties:
>        - riscv,sv32
>        - riscv,sv39
>        - riscv,sv48
> +      - riscv,sv57
>        - riscv,none
>  
>    riscv,cbom-block-size:
> -- 
> 2.39.2
> 
> 
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