[PATCH kvmtool 2/2] riscv: add zicboz support
Andrew Jones
ajones at ventanamicro.com
Tue Apr 18 08:00:42 PDT 2023
On Tue, Apr 18, 2023 at 03:22:41PM +0100, Ben Dooks wrote:
> Like ZICBOM, the ZICBOZ extension requires passing extra information to
> the guest. Add the control to pass the information to the guest, get it
> from the kvm ioctl and pass into the guest via the device-tree info.
>
> Signed-off-by: Ben Dooks <ben.dooks at codethink.co.uk>
> ---
> riscv/fdt.c | 11 +++++++++++
> riscv/include/asm/kvm.h | 2 ++
> riscv/include/kvm/kvm-config-arch.h | 3 +++
> 3 files changed, 16 insertions(+)
Hi Ben,
I have a patch almost identical to this one here
https://github.com/jones-drew/kvmtool/commit/f44010451e023b204bb1ef9767de20e0f20aca1c
The differences are that I don't add the header changes in this patch
(as they'll come with a proper header update after Linux patches get
merged), and I forgot to add the disable-zicboz, which you have.
I was planning on posting after the Linux patches get merged so
I could do the proper header update first.
Thanks,
drew
>
> diff --git a/riscv/fdt.c b/riscv/fdt.c
> index 3cdb95c..fa6d153 100644
> --- a/riscv/fdt.c
> +++ b/riscv/fdt.c
> @@ -20,6 +20,7 @@ struct isa_ext_info isa_info_arr[] = {
> {"svinval", KVM_RISCV_ISA_EXT_SVINVAL},
> {"zihintpause", KVM_RISCV_ISA_EXT_ZIHINTPAUSE},
> {"zicbom", KVM_RISCV_ISA_EXT_ZICBOM},
> + {"zicboz", KVM_RISCV_ISA_EXT_ZICBOZ},
> };
>
> static void dump_fdt(const char *dtb_file, void *fdt)
> @@ -46,6 +47,7 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
> const char *valid_isa_order = "IEMAFDQCLBJTPVNSUHKORWXYZG";
> int arr_sz = ARRAY_SIZE(isa_info_arr);
> unsigned long cbom_blksz = 0;
> + unsigned long cboz_blksz = 0;
>
> _FDT(fdt_begin_node(fdt, "cpus"));
> _FDT(fdt_property_cell(fdt, "#address-cells", 0x1));
> @@ -95,6 +97,13 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
> die("KVM_GET_ONE_REG failed (config.zicbom_block_size)");
> }
>
> + if (isa_info_arr[i].ext_id == KVM_RISCV_ISA_EXT_ZICBOZ && !cboz_blksz) {
> + reg.id = RISCV_CONFIG_REG(zicboz_block_size);
> + reg.addr = (unsigned long)&cboz_blksz;
> + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
> + die("KVM_GET_ONE_REG failed (config.zicboz_block_size)");
> + }
> +
> if ((strlen(isa_info_arr[i].name) + pos + 1) >= CPU_ISA_MAX_LEN) {
> pr_warning("Insufficient space to append ISA exension\n");
> break;
> @@ -116,6 +125,8 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
> _FDT(fdt_property_string(fdt, "riscv,isa", cpu_isa));
> if (cbom_blksz)
> _FDT(fdt_property_cell(fdt, "riscv,cbom-block-size", cbom_blksz));
> + if (cboz_blksz)
> + _FDT(fdt_property_cell(fdt, "riscv,cboz-block-size", cboz_blksz));
> _FDT(fdt_property_cell(fdt, "reg", cpu));
> _FDT(fdt_property_string(fdt, "status", "okay"));
>
> diff --git a/riscv/include/asm/kvm.h b/riscv/include/asm/kvm.h
> index 92af6f3..e44c1e9 100644
> --- a/riscv/include/asm/kvm.h
> +++ b/riscv/include/asm/kvm.h
> @@ -52,6 +52,7 @@ struct kvm_riscv_config {
> unsigned long mvendorid;
> unsigned long marchid;
> unsigned long mimpid;
> + unsigned long zicboz_block_size;
> };
>
> /* CORE registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
> @@ -105,6 +106,7 @@ enum KVM_RISCV_ISA_EXT_ID {
> KVM_RISCV_ISA_EXT_SVINVAL,
> KVM_RISCV_ISA_EXT_ZIHINTPAUSE,
> KVM_RISCV_ISA_EXT_ZICBOM,
> + KVM_RISCV_ISA_EXT_ZICBOZ,
> KVM_RISCV_ISA_EXT_MAX,
> };
>
> diff --git a/riscv/include/kvm/kvm-config-arch.h b/riscv/include/kvm/kvm-config-arch.h
> index 188125c..46a774e 100644
> --- a/riscv/include/kvm/kvm-config-arch.h
> +++ b/riscv/include/kvm/kvm-config-arch.h
> @@ -24,6 +24,9 @@ struct kvm_config_arch {
> OPT_BOOLEAN('\0', "disable-zicbom", \
> &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZICBOM], \
> "Disable Zicbom Extension"), \
> + OPT_BOOLEAN('\0', "disable-zicboz", \
> + &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZICBOZ], \
> + "Disable Zicboz Extension"), \
> OPT_BOOLEAN('\0', "disable-zihintpause", \
> &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZIHINTPAUSE],\
> "Disable Zihintpause Extension"),
> --
> 2.39.2
>
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