[PATCH v4 9/9] RISC-V: KVM: Implement guest external interrupt line management
Andrew Jones
ajones at ventanamicro.com
Tue Apr 4 09:31:49 PDT 2023
On Tue, Apr 04, 2023 at 09:04:52PM +0530, Anup Patel wrote:
> The RISC-V host will have one guest external interrupt line for each
> VS-level IMSICs associated with a HART. The guest external interrupt
> lines are per-HART resources and hypervisor can use HGEIE, HGEIP, and
> HIE CSRs to manage these guest external interrupt lines.
>
> Signed-off-by: Anup Patel <apatel at ventanamicro.com>
> ---
> arch/riscv/include/asm/kvm_aia.h | 10 ++
> arch/riscv/kvm/aia.c | 239 +++++++++++++++++++++++++++++++
> arch/riscv/kvm/main.c | 3 +-
> arch/riscv/kvm/vcpu.c | 2 +
> 4 files changed, 253 insertions(+), 1 deletion(-)
>
Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
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