[PATCH v3 0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting
Anup Patel
apatel at ventanamicro.com
Fri Nov 25 03:21:02 PST 2022
This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP
feature based on RISC-V platform capabilities.
These patches can also be found in riscv_timer_dt_imp_v3 branch at:
https://github.com/avpatel/linux.git
Changes since v2:
- Include Conor's revert patch as the first patch and rebased other patches
- Update PATCH2 to document bindings for separate RISC-V timer DT node
- Update PATCH3 based on RISC-V timer DT node bindings
Changes since v1:
- Rebased on Linux-5.19-rc8
- Renamed "riscv,always-on" DT property to "riscv,timer-can-wake-cpu"
Anup Patel (2):
dt-bindings: timer: Add bindings for the RISC-V timer device
clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT
Conor Dooley (1):
Revert "clocksource/drivers/riscv: Events are stopped during CPU
suspend"
.../bindings/timer/riscv,timer.yaml | 52 +++++++++++++++++++
drivers/clocksource/timer-riscv.c | 12 ++++-
2 files changed, 63 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/timer/riscv,timer.yaml
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2.34.1
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