[PATCH v1 9/9] riscv: dts: microchip: add parent ranges and dma-ranges for IKRD v2022.09

[Conor Dooley]

Hey Rob,

On Wed, Nov 16, 2022 at 01:55:04PM +0000, daire.mcnamara at microchip.com wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
> 
> we have replaced the "microchip,matro0" hack property with what was
> suggested by Rob - create a parent bus and use ranges and dma-ranges in
> the parent bus and pcie device to achieve the address translations we
> need. Add the appropriate ranges and dma-ranges for the v2022.09 IKRD
> so that it remains functional.
> 
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> Signed-off-by: Daire McNamara <daire.mcnamara at microchip.com>

This patch was included as demonstration of what the series results in
DT wise. It's the custom address translation property that you had
NACKED in [0] but done (we think) in the way that you suggested with an
extra, middle-man bus. Could you take a look & see if it fits with what
you requested?

Thanks,
Conor.

0 - https://lore.kernel.org/linux-riscv/20220902142202.2437658-1-daire.mcnamara@microchip.com/

> ---
>  .../dts/microchip/mpfs-icicle-kit-fabric.dtsi | 62 +++++++++++--------
>  1 file changed, 35 insertions(+), 27 deletions(-)
> 
> diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
> index 1069134f2e12..51ce87e70b33 100644
> --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
> +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
> @@ -26,33 +26,41 @@ i2c2: i2c at 40000200 {
>  		status = "disabled";
>  	};
>  
> -	pcie: pcie at 3000000000 {
> -		compatible = "microchip,pcie-host-1.0";
> -		#address-cells = <0x3>;
> -		#interrupt-cells = <0x1>;
> -		#size-cells = <0x2>;
> -		device_type = "pci";
> -		reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
> -		reg-names = "cfg", "apb";
> -		bus-range = <0x0 0x7f>;
> -		interrupt-parent = <&plic>;
> -		interrupts = <119>;
> -		interrupt-map = <0 0 0 1 &pcie_intc 0>,
> -				<0 0 0 2 &pcie_intc 1>,
> -				<0 0 0 3 &pcie_intc 2>,
> -				<0 0 0 4 &pcie_intc 3>;
> -		interrupt-map-mask = <0 0 0 7>;
> -		clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>;
> -		clock-names = "fic1", "fic3";
> -		ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>;
> -		dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>;
> -		msi-parent = <&pcie>;
> -		msi-controller;
> -		status = "disabled";
> -		pcie_intc: interrupt-controller {
> -			#address-cells = <0>;
> -			#interrupt-cells = <1>;
> -			interrupt-controller;
> +	fabric-pcie-bus {
> +		compatible = "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>,
> +			 <0x30 0x0 0x30 0x0 0x10 0x0>;
> +		dma-ranges = <0x0 0x0 0x10 0x0 0x0 0x80000000>;
> +		pcie: pcie at 3000000000 {
> +			compatible = "microchip,pcie-host-1.0";
> +			#address-cells = <0x3>;
> +			#interrupt-cells = <0x1>;
> +			#size-cells = <0x2>;
> +			device_type = "pci";
> +			reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
> +			reg-names = "cfg", "apb";
> +			bus-range = <0x0 0x7f>;
> +			interrupt-parent = <&plic>;
> +			interrupts = <119>;
> +			interrupt-map = <0 0 0 1 &pcie_intc 0>,
> +					<0 0 0 2 &pcie_intc 1>,
> +					<0 0 0 3 &pcie_intc 2>,
> +					<0 0 0 4 &pcie_intc 3>;
> +			interrupt-map-mask = <0 0 0 7>;
> +			clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>;
> +			clock-names = "fic1", "fic3";
> +			ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>;
> +			dma-ranges = <0x3000000 0x10 0x0 0x0 0x0 0x0 0x80000000>;
> +			msi-parent = <&pcie>;
> +			msi-controller;
> +			status = "disabled";
> +			pcie_intc: interrupt-controller {
> +				#address-cells = <0>;
> +				#interrupt-cells = <1>;
> +				interrupt-controller;
> +			};
>  		};
>  	};
>  
> -- 
> 2.25.1
> 
> 
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