[RFC 5/9] RISC-V: KVM: Add skeleton support for perf
Andrew Jones
ajones at ventanamicro.com
Wed Nov 23 05:36:36 PST 2022
...
> > > > - csr_write(CSR_HCOUNTEREN, -1UL);
> > > > + /* VS should access only TM bit. Everything else should trap */
> > > > + csr_write(CSR_HCOUNTEREN, 0x02);
> > >
> > > This looks like something that should be broken out into a separate patch
> > > with a description of what happens now when guests try to access the newly
> > > trapping counter registers. We should probably also create a TM define.
> > >
> >
> > Done.
> >
>
> As we allow cycles & instret for host user space now [1], should we do the same
> for guests as well ? I would prefer not to but same user space
> software will start to break
> they will run inside a guest.
>
> https://lore.kernel.org/all/20220928131807.30386-1-palmer@rivosinc.com/
>
Yeah, it seems like we should either forbid access to unprivileged users
or ensure the numbers include some random noise. For guests, a privileged
KVM userspace should need to explicitly request access for them, ensuring
that the creation of privileged guests is done by conscious choice.
Thanks,
drew
More information about the linux-riscv
mailing list