[PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Emil Renner Berthing
emil.renner.berthing at canonical.com
Fri Nov 18 08:50:41 PST 2022
On Fri, 18 Nov 2022 at 02:06, Hal Feng <hal.feng at starfivetech.com> wrote:
>
> From: Emil Renner Berthing <kernel at esmil.dk>
>
> Add bindings for the system clock and reset generator (SYSCRG) on the
> JH7110 RISC-V SoC by StarFive Ltd.
>
> Signed-off-by: Emil Renner Berthing <kernel at esmil.dk>
> Signed-off-by: Hal Feng <hal.feng at starfivetech.com>
> ---
> .../clock/starfive,jh7110-syscrg.yaml | 80 +++++++++++++++++++
> MAINTAINERS | 2 +-
> 2 files changed, 81 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
> new file mode 100644
> index 000000000000..a8cafbc0afe2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
> @@ -0,0 +1,80 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 System Clock and Reset Generator
> +
> +maintainers:
> + - Emil Renner Berthing <kernel at esmil.dk>
> +
> +properties:
> + compatible:
> + const: starfive,jh7110-syscrg
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: Main Oscillator (24 MHz)
> + - description: RMII reference clock
> + - description: RGMII RX clock
> + - description: I2S TX bit clock
> + - description: I2S TX left/right clock
> + - description: I2S RX bit clock
> + - description: I2S RX left/right clock
> + - description: TDM
> + - description: mclk
Maybe you could ask your colleagues for a better description of these clocks.
> +
> + clock-names:
> + items:
> + - const: osc
> + - const: gmac1_rmii_refin
> + - const: gmac1_rgmii_rxin
> + - const: i2stx_bclk_ext
> + - const: i2stx_lrck_ext
> + - const: i2srx_bclk_ext
> + - const: i2srx_lrck_ext
> + - const: tdm_ext
> + - const: mclk_ext
> +
> + '#clock-cells':
> + const: 1
> + description:
> + See <dt-bindings/clock/starfive-jh7110.h> for valid indices.
> +
> + '#reset-cells':
> + const: 1
> + description:
> + See <dt-bindings/reset/starfive-jh7110.h> for valid indices.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - '#clock-cells'
> + - '#reset-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + clock-controller at 13020000 {
> + compatible = "starfive,jh7110-syscrg";
> + reg = <0x13020000 0x10000>;
> + clocks = <&osc>, <&gmac1_rmii_refin>,
> + <&gmac1_rgmii_rxin>,
> + <&i2stx_bclk_ext>, <&i2stx_lrck_ext>,
> + <&i2srx_bclk_ext>, <&i2srx_lrck_ext>,
> + <&tdm_ext>, <&mclk_ext>;
> + clock-names = "osc", "gmac1_rmii_refin",
> + "gmac1_rgmii_rxin",
> + "i2stx_bclk_ext", "i2stx_lrck_ext",
> + "i2srx_bclk_ext", "i2srx_lrck_ext",
> + "tdm_ext", "mclk_ext";
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index eeab26f5597c..ec6647e2772f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19602,7 +19602,7 @@ STARFIVE CLOCK DRIVERS
> M: Emil Renner Berthing <kernel at esmil.dk>
> M: Hal Feng <hal.feng at starfivetech.com>
> S: Maintained
> -F: Documentation/devicetree/bindings/clock/starfive,jh7100-*.yaml
> +F: Documentation/devicetree/bindings/clock/starfive*
> F: drivers/clk/starfive/
> F: include/dt-bindings/clock/starfive*
>
> --
> 2.38.1
>
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