[PATCH -next v2 2/3] RISC-V: uapi: add HWCAP for Bitmanip/Scalar Crypto

[Zenithal]

On Wed, May 18, 2022 at 09:39:53AM +0000, Conor.Dooley at microchip.com wrote:
> On 18/05/2022 10:25, Hongren (Zenithal) Zheng wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > userspace currently lacks a way to detect whether the
> > platform has Bitmanip/Scalar Crypto capability,
> > this commit provides a way such that the userspace
> > can detect it.
> > 
> > RISC-V currently still has no mature mechanism,
> > but no matter how things in the spec changes,
> > (no matter how "M" mode things change), the kernel
> > still needs to offer some API to the userspace.
> > 
> > More discussion can be found at
> > https://github.com/openssl/openssl/pull/18197
> > Userspace currently has to use env var to detect them.
> > 
> > This commit along does not assume any specific mechanism
> > below kernel.
> 
> s/along/alone?

Thanks for catching this typo!

> 
> But I think you could rewrite this sentence to make it
> clearer, I had to read it more than once to see if that was
> actually a typo or not.
> Possibly swap "This commit" for "This interface" or similar,
> both here and in the first paragraph.
> Maybe something like:
> 
> "This interface does not make any assumptions about the
> underlying hardware"

Will use this kind of description in the next version.

> 
> Thanks,
> Conor.