[PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC

[Conor Dooley]

On Tue, Dec 20, 2022 at 09:12:40AM +0800, Hal Feng wrote:
> This patch series adds basic device tree support for StarFive JH7110 SoC.
> This patch series depends on series [1] and [2]. You can simply get or
> review the patches at the link [3].
> Emil Renner Berthing (7):
>   dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board

I've applied this one to riscv-dt-for-next
https://git.kernel.org/conor/c/97b7ed072784

>   dt-bindings: timer: Add StarFive JH7110 clint
>   dt-bindings: interrupt-controller: Add StarFive JH7110 plic

>   dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC
>   soc: sifive: ccache: Add StarFive JH7110 support

And these two to riscv-soc-for-next
https://git.kernel.org/conor/c/1caf002efa22
https://git.kernel.org/conor/c/6635e91648ce

>   riscv: dts: starfive: Add initial StarFive JH7110 device tree
>   riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device
>     tree

The rest I can take with maintainer Acks alongside the DT, or they can
go via subsystem trees.
The DT is waiting for the clock/reset & pinctrl binding headers anyway,
so IDC which it is.

Thanks,
Conor.

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