[PATCH v3 6/7] riscv: dts: starfive: Add initial StarFive JH7110 device tree
Conor Dooley
conor at kernel.org
Tue Dec 20 13:31:43 PST 2022
On Tue, Dec 20, 2022 at 09:12:46AM +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel at esmil.dk>
>
> Add initial device tree for the JH7110 RISC-V SoC by StarFive
> Technology Ltd.
>
> Signed-off-by: Emil Renner Berthing <kernel at esmil.dk>
> Co-developed-by: Jianlong Huang <jianlong.huang at starfivetech.com>
> Signed-off-by: Jianlong Huang <jianlong.huang at starfivetech.com>
> Co-developed-by: Hal Feng <hal.feng at starfivetech.com>
> Signed-off-by: Hal Feng <hal.feng at starfivetech.com>
> ---
FWIW, this cpu-map is now the default in linux, so you no longer *need*
to add it for that purpose - but there's obviously no harm in being
explicit for other operating systems etc. (IOW, don't remove it!)
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&S76_0>;
> + };
> +
> + core1 {
> + cpu = <&U74_1>;
> + };
> +
> + core2 {
> + cpu = <&U74_2>;
> + };
> +
> + core3 {
> + cpu = <&U74_3>;
> + };
> +
> + core4 {
> + cpu = <&U74_4>;
> + };
> + };
> + };
> + };
> + syscrg: clock-controller at 13020000 {
For obvious reasons, I cannot apply this until both the clock & pinctrl
bindings are in my tree - but you know that already.
> + compatible = "starfive,jh7110-syscrg";
> + reg = <0x0 0x13020000 0x0 0x10000>;
> + clocks = <&osc>, <&gmac1_rmii_refin>,
> + <&gmac1_rgmii_rxin>,
> + <&i2stx_bclk_ext>, <&i2stx_lrck_ext>,
> + <&i2srx_bclk_ext>, <&i2srx_lrck_ext>,
> + <&tdm_ext>, <&mclk_ext>;
As Krzk asked - are these clocks really all inputs to the SoC?
> + clock-names = "osc", "gmac1_rmii_refin",
> + "gmac1_rgmii_rxin",
> + "i2stx_bclk_ext", "i2stx_lrck_ext",
> + "i2srx_bclk_ext", "i2srx_lrck_ext",
> + "tdm_ext", "mclk_ext";
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> + gpio: gpio at 13040000 {
> + gpioa: gpio at 17020000 {
Out of curiousity, why gpio & gpioa?
Thanks,
Conor.
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