[PATCH v1 6/7] riscv: dts: starfive: jh7110: Add ethernet device node
yanhong wang
yanhong.wang at starfivetech.com
Thu Dec 1 21:53:17 PST 2022
On 2022/12/2 1:45, Conor Dooley wrote:
> On Thu, Dec 01, 2022 at 05:02:41PM +0800, Yanhong Wang wrote:
>> Add JH7110 ethernet device node to support gmac driver for the JH7110
>> RISC-V SoC.
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang at starfivetech.com>
>> ---
>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 80 ++++++++++++++++++++++++
>> 1 file changed, 80 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index c22e8f1d2640..97ed5418d91f 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -433,5 +433,85 @@
>> reg-shift = <2>;
>> status = "disabled";
>> };
>> +
>> + stmmac_axi_setup: stmmac-axi-config {
>> + snps,wr_osr_lmt = <4>;
>> + snps,rd_osr_lmt = <4>;
>> + snps,blen = <256 128 64 32 0 0 0>;
>> + };
>> +
>> + gmac0: ethernet at 16030000 {
>> + compatible = "starfive,dwmac", "snps,dwmac-5.20";
>> + reg = <0x0 0x16030000 0x0 0x10000>;
>> + clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
>> + <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
>> + <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
>> + <&aoncrg JH7110_AONCLK_GMAC0_TX>,
>> + <&syscrg JH7110_SYSCLK_GMAC0_GTXC>,
>> + <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>;
>> + clock-names = "stmmaceth",
>> + "pclk",
>> + "ptp_ref",
>> + "tx",
>> + "gtxc",
>> + "gtx";
>
> Can you sort this into fewer lines please?
Will sort in the next version.
>
>> + resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
>> + <&aoncrg JH7110_AONRST_GMAC0_AHB>;
>> + reset-names = "stmmaceth", "ahb";
>> + interrupts = <7>, <6>, <5> ;
>
> Please also remove the space before the ;
Will remove the space.
>
>> + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>
> The answer is probably "the dw driver needs this" but my OCD really
> hates "macirq" vs "eth_wake_irq"..
The definition of "macirq" and "eth_wake_irq" is to reuse stmmac_get_platform_resources() API.
>
>> + phy-mode = "rgmii-id";
>> + snps,multicast-filter-bins = <64>;
>> + snps,perfect-filter-entries = <8>;
>> + rx-fifo-depth = <2048>;
>> + tx-fifo-depth = <2048>;
>> + snps,fixed-burst;
>> + snps,no-pbl-x8;
>> + snps,force_thresh_dma_mode;
>> + snps,axi-config = <&stmmac_axi_setup>;
>> + snps,tso;
>> + snps,en-tx-lpi-clockgating;
>> + snps,lpi_en;
>> + snps,txpbl = <16>;
>> + snps,rxpbl = <16>;
>> + status = "disabled";
>> + };
>> +
>> + gmac1: ethernet at 16040000 {
>> + compatible = "starfive,dwmac", "snps,dwmac-5.20";
>> + reg = <0x0 0x16040000 0x0 0x10000>;
>> + clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
>> + <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
>> + <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
>> + <&syscrg JH7110_SYSCLK_GMAC1_TX>,
>> + <&syscrg JH7110_SYSCLK_GMAC1_GTXC>,
>> + <&syscrg JH7110_SYSCLK_GMAC1_GTXCLK>;
>> + clock-names = "stmmaceth",
>> + "pclk",
>> + "ptp_ref",
>> + "tx",
>> + "gtxc",
>> + "gtx";
>> + resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
>> + <&syscrg JH7110_SYSRST_GMAC1_AHB>;
>> + reset-names = "stmmaceth", "ahb";
>> + interrupts = <78>, <77>, <76> ;
>
> Same comments for this node.
Will remove the space.
>
>> + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>> + phy-mode = "rgmii-id";
>> + snps,multicast-filter-bins = <64>;
>> + snps,perfect-filter-entries = <8>;
>> + rx-fifo-depth = <2048>;
>> + tx-fifo-depth = <2048>;
>> + snps,fixed-burst;
>> + snps,no-pbl-x8;
>> + snps,force_thresh_dma_mode;
>> + snps,axi-config = <&stmmac_axi_setup>;
>> + snps,tso;
>> + snps,en-tx-lpi-clockgating;
>> + snps,lpi_en;
>> + snps,txpbl = <16>;
>> + snps,rxpbl = <16>;
>> + status = "disabled";
>> + };
>> };
>> };
>> --
>> 2.17.1
>>
More information about the linux-riscv
mailing list