[PATCH] riscv: Apply a static assert to riscv_isa_ext_id

[Conor Dooley]

On Thu, Dec 01, 2022 at 12:37:50PM +0100, Andrew Jones wrote:
> Add a static assert to ensure a RISCV_ISA_EXT_* enum is never
> created with a value >= RISCV_ISA_EXT_MAX. We can do this by
> putting RISCV_ISA_EXT_ID_MAX to more work. Before it was
> redundant with RISCV_ISA_EXT_MAX and hence only used to
> document the limit. Now it grows with the enum and is used to
> check the limit.
> 
> Signed-off-by: Andrew Jones <ajones at ventanamicro.com>
> ---
>  arch/riscv/include/asm/hwcap.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
> index b22525290073..86328e3acb02 100644
> --- a/arch/riscv/include/asm/hwcap.h
> +++ b/arch/riscv/include/asm/hwcap.h
> @@ -59,8 +59,9 @@ enum riscv_isa_ext_id {
>  	RISCV_ISA_EXT_ZIHINTPAUSE,
>  	RISCV_ISA_EXT_SSTC,
>  	RISCV_ISA_EXT_SVINVAL,
> -	RISCV_ISA_EXT_ID_MAX = RISCV_ISA_EXT_MAX,
> +	RISCV_ISA_EXT_ID_MAX
>  };
> +static_assert(RISCV_ISA_EXT_ID_MAX <= RISCV_ISA_EXT_MAX);

FWIW checkpatch complains about the lack of a blank line prior to the
static_assert, but dunno how much anyone cares about that. Lack of a
blank line here makes the purpose more obvious to me /shrug

Reviewed-by: Conor Dooley <conor.dooley at microchip.com>

>  
>  /*
>   * This enum represents the logical ID for each RISC-V ISA extension static
> -- 
> 2.38.1
> 
> 
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