[PATCH 11/15] doc: dt: bindings: usb: dwc3-rtk-type_c: Add the dwc3-rtk-type_c driver doc.

[Stanley Chang]

Realtek DHC SoCs embeds a simple type c module to detect cc pin status.

Signed-off-by: Stanley Chang <stanley_chang at realtek.com>
---
 .../bindings/usb/dwc3-rtk-type_c.yaml         | 90 +++++++++++++++++++
 1 file changed, 90 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/dwc3-rtk-type_c.yaml

diff --git a/Documentation/devicetree/bindings/usb/dwc3-rtk-type_c.yaml b/Documentation/devicetree/bindings/usb/dwc3-rtk-type_c.yaml
new file mode 100644
index 000000000000..f211d0b52ea0
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/dwc3-rtk-type_c.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2020 Realtek Semiconductor Corporation
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/usb/dwc3-rtk-type_c.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Realtek DWC3 USB Type C module driver
+
+maintainers:
+  - Stanley Chang <stanley_chang at realtek.com>
+
+description: |
+  The Realtek DHC Soc embeds a simple type c module to detect cc pin status.
+  This driver can switch USB host/device mode dynamically based on the type c
+  status.
+
+properties:
+  compatible:
+    enum:
+      - realtek,dwc3-type_c
+
+  ranges: true
+
+  reg:
+    maxItems: 1
+
+  boot_check_time:
+    To set a time for checking the device mode on boot.
+
+  debug:
+    A debug flag to print debug log.
+
+  default_revision:
+    Set the default version of used parameter.
+
+
+  A00:
+    The parameter node for type c module.
+
+required:
+  - compatible
+  - "#address-cells"
+  - "#size-cells"
+  - ranges
+  - reg
+  - default_revision
+  - A00
+
+examples:
+  - |
+
+    rtk_dwc3_type_c at 98007220 {
+        compatible = "realtek,dwc3-type_c";
+        reg = <0x98007220 0x20>;
+        interrupts = <0 60 4>;
+        //debug; /*to enable debug log*/
+        delay_probe_work; /*To delay probe work*/
+        boot_check_time = <30000>; /*ms (At boot Device switch Host time)*/
+        status = "okay";
+
+        default_revision = <0xA00>;
+        A00 {
+            cc_dfp_mode = "dfp_3_0"; /*dfp_3_0, dfp_1_5, dfp_usb*/
+            cc1_rp_4p7k_code = <0xC>;
+            cc1_rp_36k_code = <0xF>;
+            cc1_rp_12k_code = <0xE>;
+            cc1_rd_code = <0x11>;
+            cc1_vref_ufp = /bits/ 8
+                <0x7 0xA 0x2>; /*<1p23v,0p66v,0p2v>*/
+            cc1_vref_dfp_usb = /bits/ 8
+                <0x7 0x2 0x0>; /*<0_1p6v,0p2v,unused>*/
+            cc1_vref_dfp_1_5 = /bits/ 8
+                <0x7 0x3 0x2>; /*<1_1p6v,0p4v,0p2v>*/
+            cc1_vref_dfp_3_0 = /bits/ 8
+                <0x5 0xA 0x2>; /*<2p6v,0p8v,0p2v>*/
+            cc2_rp_4p7k_code = <0xC>;
+            cc2_rp_36k_code = <0xF>;
+            cc2_rp_12k_code = <0xE>;
+            cc2_rd_code = <0xF>;
+            cc2_vref_ufp = /bits/ 8
+                <0x8 0xA 0x2>; /*<1p23v,0p66v,0p2v>*/
+            cc2_vref_dfp_usb = /bits/ 8
+                <0x7 0x2 0x0>; /*<0_1p6v,0p2v,unused>*/
+            cc2_vref_dfp_1_5 = /bits/ 8
+                <0x7 0x3 0x2>; /*<1_1p6v,0p4v,0p2v>*/
+            cc2_vref_dfp_3_0 = /bits/ 8
+                <0x5 0xA 0x2>; /*<2p6v,0p8v,0p2v>*/
+        };
+    };
-- 
2.28.0