[PATCH v7 04/10] nvme-pci: use block layer helpers to constrain queue affinity
Hannes Reinecke
hare at suse.de
Wed Jul 2 23:29:51 PDT 2025
On 7/2/25 18:33, Daniel Wagner wrote:
> Ensure that IRQ affinity setup also respects the queue-to-CPU mapping
> constraints provided by the block layer. This allows the NVMe driver
> to avoid assigning interrupts to CPUs that the block layer has excluded
> (e.g., isolated CPUs).
>
> Signed-off-by: Daniel Wagner <wagi at kernel.org>
> ---
> drivers/nvme/host/pci.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
> index a509dc1f1d1400bc0de6d2f9424c126d9b966751..5293d5a3e5ee19427bec834741258be134bdc2c9 100644
> --- a/drivers/nvme/host/pci.c
> +++ b/drivers/nvme/host/pci.c
> @@ -2589,6 +2589,7 @@ static int nvme_setup_irqs(struct nvme_dev *dev, unsigned int nr_io_queues)
> .pre_vectors = 1,
> .calc_sets = nvme_calc_irq_sets,
> .priv = dev,
> + .mask = blk_mq_possible_queue_affinity(),
> };
> unsigned int irq_queues, poll_queues;
> unsigned int flags = PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY;
>
That was easy :-)
Reviewed-by: Hannes Reinecke <hare at suse.de>
Cheers,
Hannes
--
Dr. Hannes Reinecke Kernel Storage Architect
hare at suse.de +49 911 74053 688
SUSE Software Solutions GmbH, Frankenstr. 146, 90461 Nürnberg
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