[PATCH] nvme: fixup boot failure on nvme-pci

[Domenico Andreoli]

On Mon, Apr 14, 2025 at 02:26:16PM +0200, Christoph Hellwig wrote:
> On Mon, Apr 14, 2025 at 02:05:09PM +0200, hare at kernel.org wrote:
> > From: Hannes Reinecke <hare at kernel.org>
> > 
> > Commit 62baf70c3274 caused the ANA log page to be re-read, even on systems
> > where the ANA is not supported.
> 
> And unsupported log page should normally not cause a boot failure, but
> it seems the controller in question does not handle it well.  I've
> applied the patch with a better subjet and commit message explaining this.

These are the messages that hang my FriendlyELEC NanoPI M4 SBC at boot:

[    4.342362] nvme nvme0: 6/0/0 default/read/poll queues
[    4.359986]  nvme0n1: p2 p3 p8 p9
[   35.830402] nvme nvme0: controller is down; will reset: CSTS=0x3, PCI_STATUS=0x1010
[   35.879571] nvme0n1: I/O Cmd(0x2) @ LBA 1000215040, 8 blocks, I/O Error (sct 0x3 / sc 0x71)
[   35.880346] I/O error, dev nvme0n1, sector 1000215040 op 0x0:(READ) flags 0x80700 phys_seg 1 prio class 0
[   35.881320] nvme nvme0: Failed to get ANA log: -4
[   35.926157] nvme nvme0: D3 entry latency set to 8 seconds
[   35.939041] nvme nvme0: 6/0/0 default/read/poll queues
[   66.550428] nvme nvme0: controller is down; will reset: CSTS=0x3, PCI_STATUS=0x1010
[   66.600020] nvme0n1: I/O Cmd(0x2) @ LBA 1000215152, 8 blocks, I/O Error (sct 0x3 / sc 0x71)
[   66.600806] I/O error, dev nvme0n1, sector 1000215152 op 0x0:(READ) flags 0x80700 phys_seg 1 prio class 0
[   66.610493] nvme nvme0: Failed to get ANA log: -4
[   66.654065] nvme nvme0: D3 entry latency set to 8 seconds
[   66.667024] nvme nvme0: 6/0/0 default/read/poll queues
[   97.270420] nvme nvme0: controller is down; will reset: CSTS=0x3, PCI_STATUS=0x1010
[   97.320023] nvme0n1: I/O Cmd(0x2) @ LBA 1000214240, 8 blocks, I/O Error (sct 0x3 / sc 0x71)
[   97.320796] I/O error, dev nvme0n1, sector 1000214240 op 0x0:(READ) flags 0x80700 phys_seg 1 prio class 0
[   97.330486] nvme nvme0: Failed to get ANA log: -4
[   97.378015] nvme nvme0: D3 entry latency set to 8 seconds
[   97.390837] nvme nvme0: 6/0/0 default/read/poll queues

> But if the controller handles unsupported log pages so badly it will
> probably cause trouble in the future as well, or even now when
> applications ask for unsupported log pages using the passthrough
> interfaces.
> 
> Srikanth: what controller is this?  I'd like to add that to the commit
> message as well.

00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3399 PCI Express Root Port
01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM981/PM981/PM983

With the patch above everything works again.

Thanks,
Dom

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