[PATCH] nvme-pci: 512 byte aligned dma pool segment quirk

[Keith Busch]

On Wed, Nov 13, 2024 at 05:31:51AM +0100, Christoph Hellwig wrote:
> On Tue, Nov 12, 2024 at 07:50:00PM +0000, Bob Beckett wrote:
> > From: Robert Beckett <bob.beckett at collabora.com>
> > 
> > We initially put in a quick fix of limiting the queue depth to 1
> > as experimentation showed that it fixed data corruption on 64GB
> > steamdecks.
> > 
> > After further experimentation, it appears that the corruption
> > is fixed by aligning the small dma pool segments to 512 bytes.
> > Testing via desync image verification shows that it now passes
> > thousands of verification loops, where previously
> > it never managed above 7.
> 
> As suggested before, instead of changing the pool size please just
> always use the large pool for this device.

Well, he's doing what I suggested. I thought this was better because it
puts the decision making in the initialization path instead of the IO
path.