[PATCH] nvme-pci: let platform handle subsystem reset fallout

Keith Busch kbusch at kernel.org
Mon Jun 24 09:24:30 PDT 2024


On Mon, Jun 24, 2024 at 06:15:58PM +0200, Christoph Hellwig wrote:
> On Mon, Jun 24, 2024 at 09:07:56AM -0700, Keith Busch wrote:
> > From: Keith Busch <kbusch at kernel.org>
> > 
> > Scheduling reset_work after a nvme subsystem reset is expected to fail,
> > but this also prevents potential handling the platform may provide from
> > successfully recovering the link without re-enumeration. Provide a pci
> > specific operation that safely initiates a subsystem reset, and instead
> > of scheduling reset work, read back the status register to trigger a
> > pcie read error.
> 
> What does platform mean here?

I'm thinking of pcie port serices: AER, DPC, or hotplug. Nilay's power
platfrom has their own proprietary mechanism called EEH.

If you're platform has none of these, you'll have to wait for an IO
timeout for the driver to try to do anything to recover. Before this
patch, the driver would just quickly unbind.



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