[PATCH v2 1/1] nvme-pci: Verify the CMB's Controller Base Address.

[sathya.m at samsung.com]

From: Sathyavathi M <sathya.m at samsung.com>

As per the NVMe Base Specification, CMB should not be enabled if
the CMB's Controller Base Address(CMBMSC.CBA) is invalid. This patch
detects if the CMB's Controller Base Address is valid or not.

Signed-off-by: Sathyavathi M <sathya.m at samsung.com>
---
 drivers/nvme/host/pci.c | 2 ++
 include/linux/nvme.h    | 5 +++++
 2 files changed, 7 insertions(+)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index e6267a6..5e508db 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1856,6 +1856,8 @@ static void nvme_map_cmb(struct nvme_dev *dev)
 		hi_lo_writeq(NVME_CMBMSC_CRE | NVME_CMBMSC_CMSE |
 			     (pci_bus_address(pdev, bar) + offset),
 			     dev->bar + NVME_REG_CMBMSC);
+		if (readl(dev->bar + NVME_REG_CMBSTS) & NVME_CMBSTS_CBAI)
+			return;
 	}
 
 	/*
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index bc605ec..b55cacd 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -145,6 +145,7 @@ enum {
 	NVME_REG_CMBMSC = 0x0050,	/* Controller Memory Buffer Memory
 					 * Space Control
 					 */
+	NVME_REG_CMBSTS	= 0x0058,	/* Controller Memory Buffer Status */
 	NVME_REG_CRTO	= 0x0068,	/* Controller Ready Timeouts */
 	NVME_REG_PMRCAP	= 0x0e00,	/* Persistent Memory Capabilities */
 	NVME_REG_PMRCTL	= 0x0e04,	/* Persistent Memory Region Control */
@@ -245,6 +246,10 @@ enum {
 	NVME_CAP_CRMS_CRIMS	= 1ULL << 60,
 };
 
+enum {
+	NVME_CMBSTS_CBAI	= 1 << 0,
+};
+
 struct nvme_id_power_state {
 	__le16			max_power;	/* centiwatts */
 	__u8			rsvd2;
-- 
1.8.3.1