[PATCH 1/1] nvme-pci: Verify the CMB's Controller Base Address.

[Keith Busch]

On Wed, Feb 07, 2024 at 10:31:38AM +0530, sathya.m at samsung.com wrote:
> @@ -1856,6 +1856,9 @@ static void nvme_map_cmb(struct nvme_dev *dev)
>  		hi_lo_writeq(NVME_CMBMSC_CRE | NVME_CMBMSC_CMSE |
>  			     (pci_bus_address(pdev, bar) + offset),
>  			     dev->bar + NVME_REG_CMBMSC);
> +		/* Check the status of Controller Memory Buffer */
> +		if (readl(dev->bar + NVME_REG_CMBSTS) & 0x1)
> +			return;

Let's define an enum, NVME_CMBSTS_CBAI = 1, which will make the code
clear enough that you don't even need the extra comment.

Otherwise looks fine. This field was introduced in 1.4, but defined to
be backwards compatible.