[PATCH v9 22/25] net/mlx5e: NVMEoTCP, ddp setup and resync
Aurelien Aptel
aaptel at nvidia.com
Tue Jan 17 07:35:32 PST 2023
From: Ben Ben-Ishay <benishay at nvidia.com>
NVMEoTCP offload uses buffer registration for every NVME request to perform
direct data placement. This is achieved by creating a NIC HW mapping
between the CCID (command capsule ID) to the set of buffers that compose
the request. The registration is implemented via MKEY for which we do
fast/async mapping using KLM UMR WQE.
The buffer registration takes place when the ULP calls the ddp_setup op
which is done before they send their corresponding request to the other
side (e.g nvmf target). We don't wait for the completion of the
registration before returning back to the ulp. The reason being that
the HW mapping should be in place fast enough vs the RTT it would take
for the request to be responded. If this doesn't happen, some IO may not
be ddp-offloaded, but that doesn't stop the overall offloading session.
When the offloading HW gets out of sync with the protocol session, a
hardware/software handshake takes place to resync. The ddp_resync op is the
part of the handshake where the SW confirms to the HW that a indeed they
identified correctly a PDU header at a certain TCP sequence number. This
allows the HW to resume the offload.
The 1st part of the handshake is when the HW identifies such sequence
number in an arriving packet. A special mark is made on the completion
(cqe) and then the mlx5 driver invokes the ddp resync_request callback
advertised by the ULP in the ddp context - this is in downstream patch.
Signed-off-by: Ben Ben-Ishay <benishay at nvidia.com>
Signed-off-by: Boris Pismenny <borisp at nvidia.com>
Signed-off-by: Or Gerlitz <ogerlitz at nvidia.com>
Signed-off-by: Yoray Zack <yorayz at nvidia.com>
Signed-off-by: Aurelien Aptel <aaptel at nvidia.com>
Reviewed-by: Tariq Toukan <tariqt at nvidia.com>
---
.../mellanox/mlx5/core/en_accel/nvmeotcp.c | 146 +++++++++++++++++-
1 file changed, 144 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c
index 6ab46497e1dc..7c7be7cb9701 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/nvmeotcp.c
@@ -682,19 +682,156 @@ mlx5e_nvmeotcp_queue_teardown(struct net_device *netdev,
mlx5e_nvmeotcp_put_queue(queue);
}
+static bool
+mlx5e_nvmeotcp_validate_small_sgl_suffix(struct scatterlist *sg, int sg_len, int mtu)
+{
+ int i, hole_size, hole_len, chunk_size = 0;
+
+ for (i = 1; i < sg_len; i++)
+ chunk_size += sg_dma_len(&sg[i]);
+
+ if (chunk_size >= mtu)
+ return true;
+
+ hole_size = mtu - chunk_size - 1;
+ hole_len = DIV_ROUND_UP(hole_size, PAGE_SIZE);
+
+ if (sg_len + hole_len > MAX_SKB_FRAGS)
+ return false;
+
+ return true;
+}
+
+static bool
+mlx5e_nvmeotcp_validate_big_sgl_suffix(struct scatterlist *sg, int sg_len, int mtu)
+{
+ int i, j, last_elem, window_idx, window_size = MAX_SKB_FRAGS - 1;
+ int chunk_size = 0;
+
+ last_elem = sg_len - window_size;
+ window_idx = window_size;
+
+ for (j = 1; j < window_size; j++)
+ chunk_size += sg_dma_len(&sg[j]);
+
+ for (i = 1; i <= last_elem; i++, window_idx++) {
+ chunk_size += sg_dma_len(&sg[window_idx]);
+ if (chunk_size < mtu - 1)
+ return false;
+
+ chunk_size -= sg_dma_len(&sg[i]);
+ }
+
+ return true;
+}
+
+/* This function makes sure that the middle/suffix of a PDU SGL meets the
+ * restriction of MAX_SKB_FRAGS. There are two cases here:
+ * 1. sg_len < MAX_SKB_FRAGS - the extreme case here is a packet that consists
+ * of one byte from the first SG element + the rest of the SGL and the remaining
+ * space of the packet will be scattered to the WQE and will be pointed by
+ * SKB frags.
+ * 2. sg_len => MAX_SKB_FRAGS - the extreme case here is a packet that consists
+ * of one byte from middle SG element + 15 continuous SG elements + one byte
+ * from a sequential SG element or the rest of the packet.
+ */
+static bool
+mlx5e_nvmeotcp_validate_sgl_suffix(struct scatterlist *sg, int sg_len, int mtu)
+{
+ int ret;
+
+ if (sg_len < MAX_SKB_FRAGS)
+ ret = mlx5e_nvmeotcp_validate_small_sgl_suffix(sg, sg_len, mtu);
+ else
+ ret = mlx5e_nvmeotcp_validate_big_sgl_suffix(sg, sg_len, mtu);
+
+ return ret;
+}
+
+static bool
+mlx5e_nvmeotcp_validate_sgl_prefix(struct scatterlist *sg, int sg_len, int mtu)
+{
+ int i, hole_size, hole_len, tmp_len, chunk_size = 0;
+
+ tmp_len = min_t(int, sg_len, MAX_SKB_FRAGS);
+
+ for (i = 0; i < tmp_len; i++)
+ chunk_size += sg_dma_len(&sg[i]);
+
+ if (chunk_size >= mtu)
+ return true;
+
+ hole_size = mtu - chunk_size;
+ hole_len = DIV_ROUND_UP(hole_size, PAGE_SIZE);
+
+ if (tmp_len + hole_len > MAX_SKB_FRAGS)
+ return false;
+
+ return true;
+}
+
+/* This function is responsible to ensure that a PDU could be offloaded.
+ * PDU is offloaded by building a non-linear SKB such that each SGL element is
+ * placed in frag, thus this function should ensure that all packets that
+ * represent part of the PDU won't exaggerate from MAX_SKB_FRAGS SGL.
+ * In addition NVMEoTCP offload has one PDU offload for packet restriction.
+ * Packet could start with a new PDU and then we should check that the prefix
+ * of the PDU meets the requirement or a packet can start in the middle of SG
+ * element and then we should check that the suffix of PDU meets the requirement.
+ */
+static bool
+mlx5e_nvmeotcp_validate_sgl(struct scatterlist *sg, int sg_len, int mtu)
+{
+ int max_hole_frags;
+
+ max_hole_frags = DIV_ROUND_UP(mtu, PAGE_SIZE);
+ if (sg_len + max_hole_frags <= MAX_SKB_FRAGS)
+ return true;
+
+ if (!mlx5e_nvmeotcp_validate_sgl_prefix(sg, sg_len, mtu) ||
+ !mlx5e_nvmeotcp_validate_sgl_suffix(sg, sg_len, mtu))
+ return false;
+
+ return true;
+}
+
static int
mlx5e_nvmeotcp_ddp_setup(struct net_device *netdev,
struct sock *sk,
struct ulp_ddp_io *ddp)
{
+ struct scatterlist *sg = ddp->sg_table.sgl;
+ struct mlx5e_nvmeotcp_queue_entry *nvqt;
struct mlx5e_nvmeotcp_queue *queue;
+ struct mlx5_core_dev *mdev;
+ int i, size = 0, count = 0;
queue = container_of(ulp_ddp_get_ctx(sk),
struct mlx5e_nvmeotcp_queue, ulp_ddp_ctx);
+ mdev = queue->priv->mdev;
+ count = dma_map_sg(mdev->device, ddp->sg_table.sgl, ddp->nents,
+ DMA_FROM_DEVICE);
+
+ if (count <= 0)
+ return -EINVAL;
- /* Placeholder - map_sg and initializing the count */
+ if (WARN_ON(count > mlx5e_get_max_sgl(mdev)))
+ return -ENOSPC;
+
+ if (!mlx5e_nvmeotcp_validate_sgl(sg, count, READ_ONCE(netdev->mtu)))
+ return -EOPNOTSUPP;
+
+ for (i = 0; i < count; i++)
+ size += sg_dma_len(&sg[i]);
+
+ nvqt = &queue->ccid_table[ddp->command_id];
+ nvqt->size = size;
+ nvqt->ddp = ddp;
+ nvqt->sgl = sg;
+ nvqt->ccid_gen++;
+ nvqt->sgl_length = count;
+ mlx5e_nvmeotcp_post_klm_wqe(queue, KLM_UMR, ddp->command_id, count);
- mlx5e_nvmeotcp_post_klm_wqe(queue, KLM_UMR, ddp->command_id, 0);
return 0;
}
@@ -717,6 +854,11 @@ static void
mlx5e_nvmeotcp_ddp_resync(struct net_device *netdev,
struct sock *sk, u32 seq)
{
+ struct mlx5e_nvmeotcp_queue *queue =
+ container_of(ulp_ddp_get_ctx(sk), struct mlx5e_nvmeotcp_queue, ulp_ddp_ctx);
+
+ queue->after_resync_cqe = 1;
+ mlx5e_nvmeotcp_rx_post_static_params_wqe(queue, seq);
}
const struct ulp_ddp_dev_ops mlx5e_nvmeotcp_ops = {
--
2.31.1
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