[PATCH] nvme-pci: fix resume after AER recovery
Javier.gonz at samsung.com
Javier.gonz at samsung.com
Tue Feb 7 00:29:30 PST 2023
On 07.02.2023 01:51, Grochowski, Maciej wrote:
>I have tried suggested approach, with some modification: pci_device in
>pci_reset_secondary_bus is actually the bridge not NVMe device itself,
>thus I checked devices behind that bridge to see if any has D0 bit and
>base on that logic I run the custom delay.
>
>Unfortunately even with this approach I see the same issue for both
>Samsung drives, and based on kernel logs I can see that wait for
>secondary bus reset get increased. Thus seems like this quirk don't
>work for some reason. (I tried also increasing delays to different
>values but it didn't work).
Too bad.
I will write you separately to get som dumps from the device. We have
not seen this before, so we need to understand this a bit better.
Regarding the quirk, we are looking into it. Will come with something in
this thread later. Cc'ing Kanchan and Klaus.
Thanks,
Javier
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