[PATCH v3 0/2] Improvements to StorageD3Enable

[Mario Limonciello]

A number of AMD based OEM systems have problems coming out of s2idle,
which is rooted in that the NVME device power is cut off during s2idle.

That alone is not a bug - the architecture used on Cezanne, Renoir and
Picasso expects this.

Many of these systems do include the StorageD3Enable property, but it is
located in the PCI device itself not in a root port sibling like on Intel.

Intel confirmed that this during pre-production it was placed there, and
actually for production using the PCI device itself is sufficient.

During the course of discussions on the merits of different approaches it
was mentioned that although originally introduced for NVME devices, the
Microsoft specification makes allusions to non-PCI based ACPI storage
devices as well, so a proposal was created to move this into the ACPI
subsystem.

If at a later time different firmware solutions decide to advertise this
functionality, it may make sense to move out of acpi into a more generic
location.  However both AMD's and Intel's solutions for s2idle also rely
upon calling other ACPI drivers and adopting another solution will require
coming up with alternatives for those as well.

Mario Limonciello (2):
  nvme: Look for StorageD3Enable on companion ACPI device instead
  acpi: Move check for _DSD StorageD3Enable property to acpi

 drivers/acpi/device_pm.c | 24 +++++++++++++++++++
 drivers/nvme/host/pci.c  | 50 +---------------------------------------
 include/linux/acpi.h     |  5 ++++
 3 files changed, 30 insertions(+), 49 deletions(-)

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2.25.1