[PATCH] nvme: Quirks for PM1725 controllers
Sagi Grimberg
sagi at grimberg.me
Wed Jun 28 00:27:09 PDT 2017
> PM1725 controllers have a couple of quirks that need to be handled in
> the driver:
>
> - I/O queue depth must be limited to 64 entries on controllers that do
> not report MQES.
I think this can be a new quirk (NVME_QUIRK_QD_LIMIT_64 or something)
> @@ -1908,6 +1908,12 @@ static int nvme_pci_enable(struct nvme_dev *dev)
> dev_warn(dev->ctrl.device, "detected Apple NVMe controller, "
> "set queue depth=%u to work around controller resets\n",
> dev->q_depth);
> + } else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG &&
> + (pdev->device == 0xa821 || pdev->device == 0xa822) &&
> + NVME_CAP_MQES(cap) == 0) {
and the this is:
} else if (dev->ctrl.quirks & NVME_QUIRK_QD_LIMIT_64) {
While its inside the pci driver, I think it would be cleaner to
use the quirks mechanism.
Kieth? thoughts?
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