Intel NVMe reset issue

[Kong, Kwok]

It is a typo in the description to "wait for "Enable" bit to clear". It should have been "wait for CSTS.RDY bit to clear".  His code is to wait for the CSTS.RDY bit.

i.e.

+       while (!result && (readl(&dev->bar->csts) & NVME_CSTS_RDY)) {


He should also use NVME_CAP_TIMEOUT as the timeout and not 5 seconds per Matthew's last message.


-Kwok




From: Gurpreet Anand [mailto:Gurpreet.Anand at sandisk.com] 
Sent: Thursday, November 01, 2012 7:12 PM
To: Panah, Khosrow
Cc: linux-nvme at lists.infradead.org; Kong, Kwok
Subject: Re: Intel NVMe reset issue

Our interpretation of the spec suggests that driver should not poll on CC.EN but on CSTS.RDY after setting CC.EN which we see being done correctly. Can you explain why the controller needs to clear CC.EN? From the controller perspective it is a read-only bit.

Keith's response does make sense where the driver still writes to CC.EN.

Panah, what is the issue you are trying to solve here?

Thanks,
Gurpreet 


On Nov 1, 2012, at 11:38 AM, "Panah, Khosrow" <Khosrow.Panah at idt.com> wrote:
All,

While testing Intel NVMe driver on Linux, I noticed there are instances controller fails to initialize IDT controller. The problem is related to Intel Linux driver does not wait for "Enable" bit to clear when attempting to setup admin queue.  I am suggesting the following changes to "nvme_configure_admin_queue" routine:

***************
*** 1039,1044 ****
--- 1058,1078 ----
       dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;

       writel(0, &dev->bar->cc);
+       timeout = (5 * HZ) + jiffies;
+       while (!result && (readl(&dev->bar->csts) & NVME_CSTS_RDY)) {
+               msleep(100);
+               if (fatal_signal_pending(current))
+                       result = -EINTR;
+               if (time_after(jiffies, timeout)) {
+                       dev_err(&dev->pci_dev->dev,
+                               "Device busy; aborting initialisation\n");
+                       result = -ENODEV;
+               }
+       }
+       if (result) {
+               nvme_free_queue_mem(nvmeq);
+               return result;
+       }
       writel(aqa, &dev->bar->aqa);
       writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
       writeq(nvmeq->cq_dma_addr, &dev->bar->acq);

Khosrow


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