[PATCH v2 1/3] mtd: rawnand: cadence: support deferred prob when DMA is not ready
Rabara, Niravkumar L
niravkumar.l.rabara at intel.com
Tue Feb 4 02:43:20 PST 2025
Hi Miquel,
> -----Original Message-----
> From: Miquel Raynal <miquel.raynal at bootlin.com>
> Sent: Tuesday, 4 February, 2025 5:20 PM
> To: Rabara, Niravkumar L <niravkumar.l.rabara at intel.com>
> Cc: Richard Weinberger <richard at nod.at>; Vignesh Raghavendra
> <vigneshr at ti.com>; linux at treblig.org; Shen Lichuan <shenlichuan at vivo.com>;
> Jinjie Ruan <ruanjinjie at huawei.com>; u.kleine-koenig at baylibre.com; linux-
> mtd at lists.infradead.org; linux-kernel at vger.kernel.org; stable at vger.kernel.org
> Subject: Re: [PATCH v2 1/3] mtd: rawnand: cadence: support deferred prob when
> DMA is not ready
>
> Hello,
>
> > My apologies for the confusion.
> > Slave DMA terminology used in cadence nand controller bindings and
> > driver is indeed confusing.
> >
> > To answer your question it is,
> > 1 - External DMA (Generic DMA controller).
> >
> > Nand controller IP do not have embedded DMA controller (2 - peripheral
> DMA).
> >
> > FYR, how external DMA is used.
> > https://elixir.bootlin.com/linux/v6.13.1/source/drivers/mtd/nand/raw/c
> > adence-nand-controller.c#L1962
>
> In this case we should have a dmas property (and perhaps dma-names), no?
>
No, I believe.
Cadence NAND controller IP do not have dedicated handshake interface to connect
with DMA controller.
My understanding is dmas (and dma-names) are only used for the dedicated handshake
interface between peripheral and the DMA controller.
Thanks,
Nirav
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