Fwd: [PATCH 1/2] mtd: spi-nor: Add support for Macronix mx66u2g45g.
dac2 at pensando.io
Fri Jul 17 12:44:06 EDT 2020
[resend due to mailing list bounce]
On Fri, Jul 17, 2020 at 3:38 AM <Tudor.Ambarus at microchip.com> wrote:
> On 7/17/20 12:16 AM, David Clear wrote:
> > The Macronix mx66u2g45g is a 1.8V, 2Gbit (256MB) device which
> > supports x1, x2, or x4 operation.
> Please specify in the commit message if you tested this flash
> and with which controller.
> One should do the following tests:
> - read, erase, read back, hexdump -> to verify the erase op
> - generate a random file, write, read back, compare
> (e.g. sha1sum) -> to verify the write/read
> For locking operations one should do some locking tests.
We've been using with this part hooked up to the cadence-quadspi
controller (albeit with a 4.14 kernel and modified driver to
support x2 mode) for a while now, but yes I'll re-issue the patch
with a statement on testing once we have closure on the DUAL_READ
Thanks for the review. I appreciate the quick turnaround.
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