[PATCH] mtd: spi-nor: Fix runtime PM imbalance in cqspi_probe

Tudor.Ambarus at microchip.com Tudor.Ambarus at microchip.com
Wed Jul 1 03:58:52 EDT 2020


On 5/22/20 1:05 PM, Dinghao Liu wrote:
> When devm_reset_control_get_optional_exclusive() returns
> an error code, a pairing runtime PM usage counter
> decrement is needed to keep the counter balanced.
> 
> Also, call pm_runtime_disable() when pm_runtime_get_sync()
> and devm_reset_control_get_optional_exclusive() return an
> error code.
> 

I see that this is now fixed with the move to drivers/spi/spi-cadence-quadspi.c

Thanks,
ta

> Signed-off-by: Dinghao Liu <dinghao.liu at zju.edu.cn>
> ---
>  drivers/mtd/spi-nor/controllers/cadence-quadspi.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c b/drivers/mtd/spi-nor/controllers/cadence-quadspi.c
> index 494dcab4aaaa..eabdf01e0d08 100644
> --- a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c
> +++ b/drivers/mtd/spi-nor/controllers/cadence-quadspi.c
> @@ -1377,6 +1377,7 @@ static int cqspi_probe(struct platform_device *pdev)
>  	ret = pm_runtime_get_sync(dev);
>  	if (ret < 0) {
>  		pm_runtime_put_noidle(dev);
> +		pm_runtime_disable(dev);
>  		return ret;
>  	}
>  
> @@ -1390,12 +1391,16 @@ static int cqspi_probe(struct platform_device *pdev)
>  	rstc = devm_reset_control_get_optional_exclusive(dev, "qspi");
>  	if (IS_ERR(rstc)) {
>  		dev_err(dev, "Cannot get QSPI reset.\n");
> +		pm_runtime_put_sync(dev);
> +		pm_runtime_disable(dev);
>  		return PTR_ERR(rstc);
>  	}
>  
>  	rstc_ocp = devm_reset_control_get_optional_exclusive(dev, "qspi-ocp");
>  	if (IS_ERR(rstc_ocp)) {
>  		dev_err(dev, "Cannot get QSPI OCP reset.\n");
> +		pm_runtime_put_sync(dev);
> +		pm_runtime_disable(dev);
>  		return PTR_ERR(rstc_ocp);
>  	}
>  


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