[PATCH] brcmnand: Fix up the flash cache register offset for older controllers

[Karl Beldan]

From: Karl Beldan <karl.beldan-ext at sagemcom.com>

Tested on BCM{63138,6838,63268} and cross checked with the various
*_map_part.h which the brcmnand_regs_v* in brcmnand.c have historically
been derived from.

Cc: Brian Norris <computersforpeace at gmail.com>
Cc: Kamal Dasu <kdasu.kdev at gmail.com>
Cc: Boris Brezillon <boris.brezillon at free-electrons.com>
Cc: Richard Weinberger <richard at nod.at>
Cc: David Woodhouse <dwmw2 at infradead.org>
Cc: Marek Vasut <marek.vasut at gmail.com>
Cc: Cyrille Pitchen <cyrille.pitchen at wedev4u.fr>
Signed-off-by: Karl Beldan <karl.beldan-ext at sagemcom.com>
---
 drivers/mtd/nand/brcmnand/brcmnand.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 7419c5c..e6371ff6 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -250,7 +250,7 @@ static const u16 brcmnand_regs_v40[] = {
 	[BRCMNAND_OOB_READ_10_BASE]	= 0x130,
 	[BRCMNAND_OOB_WRITE_BASE]	=  0x30,
 	[BRCMNAND_OOB_WRITE_10_BASE]	=     0,
-	[BRCMNAND_FC_BASE]		= 0x200,
+	[BRCMNAND_FC_BASE]		= 0x400,
 };
 
 /* BRCMNAND v5.0 */
@@ -280,7 +280,7 @@ static const u16 brcmnand_regs_v50[] = {
 	[BRCMNAND_OOB_READ_10_BASE]	= 0x130,
 	[BRCMNAND_OOB_WRITE_BASE]	=  0x30,
 	[BRCMNAND_OOB_WRITE_10_BASE]	= 0x140,
-	[BRCMNAND_FC_BASE]		= 0x200,
+	[BRCMNAND_FC_BASE]		= 0x400,
 };
 
 /* BRCMNAND v6.0 - v7.1 */
-- 
2.10.1