[PATCH] Documentation: binding: Update endianness usage

Scott Wood oss at buserror.net
Fri Dec 1 13:55:11 PST 2017


On Fri, 2017-12-01 at 08:42 +0000, Prabhakar Kushwaha wrote:
> > -----Original Message-----
> > From: Scott Wood [mailto:oss at buserror.net]
> > Sent: Friday, December 01, 2017 10:43 AM
> > To: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>; linux-
> > mtd at lists.infradead.org; devicetree-discuss at lists.ozlabs.org
> > Cc: dedekind1 at gmail.com; computersforpeace at gmail.com
> > Subject: Re: [PATCH] Documentation: binding: Update endianness usage
> > 
> > On Wed, 2017-11-29 at 16:57 +0530, Prabhakar Kushwaha wrote:
> > > IFC controller version < 2.0 support IFC register access as
> > > big endian. These controller version also require IFC NOR signals to
> > > be connected in reverse order with NOR flash.
> > > 
> > > IFC >= 2.0 is other way around.
> > > 
> > > So updating IFC binding to take care of both using endianness field.
> > > 
> > > Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>
> > > ---
> > >  Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt | 6
> > > ++++--
> > >  1 file changed, 4 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/memory-
> > > controllers/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-
> > > controllers/fsl/ifc.txt
> > > index 89427b0..824a2ca 100644
> > > --- a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
> > > +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
> > > @@ -18,8 +18,10 @@ Properties:
> > >                interrupt (NAND_EVTER_STAT).  If there is only one,
> > >                that interrupt reports both types of event.
> > > 
> > > -- little-endian : If this property is absent, the big-endian mode will
> > > -                  be in use as default for registers.
> > > +- little-endian or big-endin : It represents how IFC registers  to be
> > > accessed.
> > > +			It also represents connection between
> > > controller
> > > and
> > > +			NOR flash. If this property is absent, the big-
> > > endian
> > > +			mode will be in use as default.
> > 
> > "endin"?
> > 
> > If big endian is the default, is this change really
> > necessary?  Particularly
> > since the big endian chips are older and thus have existing device trees.
> > 
> 
> Earlier endianness information was only used for "how to"  access IFC-NAND
> register access.
> Now this info  will also be used for defining swap requirement of NOR
> flash. 

Is this a difference between LS1021A and PPC-based chips?

> "If this property is absent,  the big-  endian mode will be in use as
> default ". This line can be removed. 
> Please let me know your view on this. 

No, it cannot be removed because there are existing device trees with IFC
nodes that don't have either property.

-Scott




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