[PATCH] mtd: nand: Add support for Micron on-die ECC controller (rev2).

[David Mosberger]

Gerhard,

On Fri, Mar 28, 2014 at 6:56 AM, Gerhard Sittig <gsi at denx.de> wrote:

> Upon read, the chip does ECC detection and correction in
> transparent ways.  So you probably just fetch the status and the
> page's content (the writesize count), omitting the OOB area.
> What would you get when you keep reading after the page size?
> Probably the OOB area.  Is it required to read this as well, to
> have it around in the write case?

Yeah, I see where the confusion comes from: ECC is not calculated
when transferring data between the chip and the host.  Instead, ECC is
calculated
when moving a page between the flash array and the chip-internal buffer.

You can transfer data between the host and the chip-internal buffer
in any way you want as it doesn't involve the ECC engine at all.

Instead, it's the READ/PAGEPROG commands that take care of checking/updating
the ECC bytes.

In the datasheet, you can see that from the fact that the chip's RDY
line will stay low
longer with internal ECC enabled: for READ, its t_R_ECC (45-70us) instead of
t_R (25us), for PROGRAM PAGE it's t_PROG_ECC (220-600us) instead of
t_PROG (200-600us).

  --david
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