Perf issue with UBIFS

[Bhavesh Parekh]

Hi all,
I am facing performance issue wil using the UBIFS on our platform.

Kernel version 2.6.36
Nand device info : Micron chip with 2K page size & 128K erase-size
ECC : ECC is done by the NAnd-controller.

We have YAFFS2 working on our platform and recently tried UBIFS on our
platform. YAFF2 Perf is 18MB/s and UBIFS is 11.2 MB/s. Looking at the
driver log we found that the UBIFS access pattern to the device is
4096+48 byte read in the main area, which means that there are lots of
unaligned read. Our platform only support aligned read, so we did an
optimization by simplying storing the last read page in the buffer
hopping that on the next read we will be reading the same page and
gain the perf. Doing this we were able to increase the perf to 14.5
MB/s

Is there any way we can make UBI to have the access in the aligned way
only ? Other wise perf will be lesser than YAFFS2.

Further we twick the nand-driver and implemented the page-cache mode
support in the driver. And change the mtd->writesize to 16K so that
request from the upper layer comes in 16K. It work fine with the
YAFFS2 and we see a perf gain of 3-4MB/s but UBIFS request pattern
remains same 4K +48 byte. Is there anything we can do here so that
UBIFS respect mtd->writesize

-Thanks
Bhavesh