[PATCH] [MTD] [CHIPS] stm_flash: new ST PSD4256G compatible flash chip driver

[Mike Frysinger]

On Sat, Sep 19, 2009 at 17:01, David Woodhouse wrote:
> On Sat, 2009-09-19 at 16:28 -0400, Mike Frysinger wrote:
>>
>> > Can't you do the same?
>>
>> afaik, it isnt JEDEC compliant either.  you can find the data sheet
>> here:
>> http://www.st.com/stonline/products/literature/ds/8116/psd4256g6v.htm
>>
>> so if i created a probe function that created a fake cfi table and
>> then called cfi_cmdset_0002(), you think the read/write/erase
>> functions would work ?
>
> At first glance, it looks like that would work, yes. It basically seems
> to be the same command set, at its core.
>
>> i dont see any mapping drivers that do this
>> kind of thing.  where can i find an example ?
>
> The examples are cfi_probe.c and jedec_probe.c. We have no example of
> setting it up _directly_ from a map driver, but that doesn't mean it
> can't be done.

thanks, this got me poking at the jedec chip driver.  i tried adding a
new MTD_UADDR_0x0AAA_0x0554 and then defining a jedec_table entry like
so:
+    {
+       .mfr_id = 0xff20,
+       .dev_id = 0xffe9,
+       .name   = "STM PSD4256G6V",
+       .uaddr  = MTD_UADDR_0x0AAA_0x0554,
+       .devtypes   = CFI_DEVICETYPE_X16,
+       .dev_size = SIZE_1MiB,
+       .cmd_set = P_ID_AMD_STD,
+       .nr_regions = 1,
+       .regions = {
+           ERASEINFO(0x10000,16)
+       },
+   },

then i was able to read/write/erase the flash device just fine from
userspace /dev/mtd via the physmap mapping driver.

the only problem i have here is with the need to 0xff pad the mfr/dev
id's.  any idea what's up with that ?  the device is 16bit and i set
my .width in my board resources to 2, but the id field is only 8bit,
so in 16bit mode the id is padded with 0xff instead of 0x00.
-mike