[PATCH] MTD: mtdconcat NAND/Sibley support (revised)

[Artem B. Bityutskiy]

On Tue, 2006-05-16 at 10:33 +0200, Jörn Engel wrote:

> Not generic enough.  You would need a similar, but not identical check
> for dataflash, another one for ecc nor, one for sibley.  And if
> someone merges yet another weird chip...
> 
> What I'm currently doing in my tree (that dwmw2 still didn't look at)
> is remove some of the special cases in existing code.  Basically, I
> start with the lowest common denominator of all devices:
> 1. Device has one erasesize.
> 2. Device has one writesize.
> 3. Erasesize is a multiple of writesize.
> 4. At least <writesize> aligned bytes must be written in one go.
> 5. Writes to any eraseblock must happen in order, from lowest offset to
>    highest.
> 6. Any number of eraseblocks can be written to in any order, providing
>    that rule 5 is followed.
> 7. Neither writesize nor erasesize must be a power of 2.

Good list. I have a comment for 5. For NOR flash it is possible to clear
individual bits and JFFS2 exploits this feature (to mark nodes
obsolete). So, it may sometimes write out-of-order. Thus, I'd
re-formulate item 5 to take this into account.

-- 
Best Regards,
Artem B. Bityutskiy,
St.-Petersburg, Russia.